Publication in README is updated.

Author: shtaxxx

README.md

@@ -17,6 +17,31 @@ Apache License 2.0
 This software package includes PLY-3.4 in "vparser/ply". The license of PLY is BSD.
 
 
+Publication
+==============================
+
+If you use Pyverilog in your research, please cite my paper.
+
+- Shinya Takamaeda-Yamazaki: Pyverilog: A Python-based Hardware Design Processing Toolkit for Verilog HDL, 11th International Symposium on Applied Reconfigurable Computing (ARC 2015) (Poster), Lecture Notes in Computer Science, Vol.9040/2015, pp.451-460, April 2015.
+[Paper](http://link.springer.com/chapter/10.1007/978-3-319-16214-0_42)
+
+```
+@inproceedings{Takamaeda:2015:ARC:Pyverilog,
+title={Pyverilog: A Python-Based Hardware Design Processing Toolkit for Verilog HDL},
+author={Takamaeda-Yamazaki, Shinya},
+booktitle={Applied Reconfigurable Computing},
+month={Apr}
+year={2015},
+pages={451-460},
+volume={9040},
+series={Lecture Notes in Computer Science},
+publisher={Springer International Publishing},
+doi={10.1007/978-3-319-16214-0_42},
+url={http://dx.doi.org/10.1007/978-3-319-16214-0_42},
+}
+```
+
+
 What's Pyverilog?
 ==============================
 
@@ -336,12 +361,6 @@ endmodule
 
 ```
 
-Publication
-==============================
-
-- Shinya Takamaeda-Yamazaki: Pyverilog: A Python-based Hardware Design Processing Toolkit for Verilog HDL, 11th International Symposium on Applied Reconfigurable Computing (ARC 2015) (Poster), Lecture Notes in Computer Science, Vol.9040/2015, pp.451-460, April 2015.
-[Paper](http://link.springer.com/chapter/10.1007/978-3-319-16214-0_42)
-
 
 Related Project and Site
 ==============================

README.rst

@@ -15,6 +15,33 @@ Apache License 2.0 (http://www.apache.org/licenses/LICENSE-2.0)
 This software package includes PLY-3.4 in "vparser/ply". The license of
 PLY is BSD.
 
+Publication
+===========
+
+If you use Pyverilog in your research, please cite my paper.
+
+-  Shinya Takamaeda-Yamazaki: Pyverilog: A Python-based Hardware Design
+   Processing Toolkit for Verilog HDL, 11th International Symposium on
+   Applied Reconfigurable Computing (ARC 2015) (Poster), Lecture Notes
+   in Computer Science, Vol.9040/2015, pp.451-460, April 2015.
+   `Paper <http://link.springer.com/chapter/10.1007/978-3-319-16214-0_42>`__
+
+::
+
+    @inproceedings{Takamaeda:2015:ARC:Pyverilog,
+    title={Pyverilog: A Python-Based Hardware Design Processing Toolkit for Verilog HDL},
+    author={Takamaeda-Yamazaki, Shinya},
+    booktitle={Applied Reconfigurable Computing},
+    month={Apr}
+    year={2015},
+    pages={451-460},
+    volume={9040},
+    series={Lecture Notes in Computer Science},
+    publisher={Springer International Publishing},
+    doi={10.1007/978-3-319-16214-0_42},
+    url={http://dx.doi.org/10.1007/978-3-319-16214-0_42},
+    }
+
 What's Pyverilog?
 =================
 
@@ -358,15 +385,6 @@ Then Verilog HDL code generated from the AST instances is displayed.
       assign led = 8;
     endmodule
 
-Publication
-===========
-
--  Shinya Takamaeda-Yamazaki: Pyverilog: A Python-based Hardware Design
-   Processing Toolkit for Verilog HDL, 11th International Symposium on
-   Applied Reconfigurable Computing (ARC 2015) (Poster), Lecture Notes
-   in Computer Science, Vol.9040/2015, pp.451-460, April 2015.
-   `Paper <http://link.springer.com/chapter/10.1007/978-3-319-16214-0_42>`__
-
 Related Project and Site
 ========================
 

pages.md

@@ -1,3 +1,28 @@
+Publication
+==============================
+
+If you use Pyverilog in your research, please cite my paper.
+
+- Shinya Takamaeda-Yamazaki: Pyverilog: A Python-based Hardware Design Processing Toolkit for Verilog HDL, 11th International Symposium on Applied Reconfigurable Computing (ARC 2015) (Poster), Lecture Notes in Computer Science, Vol.9040/2015, pp.451-460, April 2015.
+[Paper](http://link.springer.com/chapter/10.1007/978-3-319-16214-0_42)
+
+```
+@inproceedings{Takamaeda:2015:ARC:Pyverilog,
+title={Pyverilog: A Python-Based Hardware Design Processing Toolkit for Verilog HDL},
+author={Takamaeda-Yamazaki, Shinya},
+booktitle={Applied Reconfigurable Computing},
+month={Apr}
+year={2015},
+pages={451-460},
+volume={9040},
+series={Lecture Notes in Computer Science},
+publisher={Springer International Publishing},
+doi={10.1007/978-3-319-16214-0_42},
+url={http://dx.doi.org/10.1007/978-3-319-16214-0_42},
+}
+```
+
+
 What's Pyverilog?
 ==============================
 
@@ -323,13 +348,6 @@ endmodule
 ```
 
 
-Publication
-==============================
-
-- Shinya Takamaeda-Yamazaki: Pyverilog: A Python-based Hardware Design Processing Toolkit for Verilog HDL, 11th International Symposium on Applied Reconfigurable Computing (ARC 2015) (Poster), Lecture Notes in Computer Science, Vol.9040/2015, pp.451-460, April 2015.
-[Paper](http://link.springer.com/chapter/10.1007/978-3-319-16214-0_42)
-
-
 Related Project and Site
 ==============================