@@ -29,31 +29,19 @@ Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
2929#define FREQ_MHZ ((ARCV2_TIMER0_CLOCK_FREQ)/1000000)
3030static const uint64_t MS_TO_CLKS = (FREQ_MHZ * 1000 );
3131
32- static uint64_t getTimeStampClks (void )
32+ static inline __attribute__((always_inline ))
33+ uint64_t getTimeStampClks (void )
3334{
34- __asm__ volatile (
35- /* Disable interrupts - we don't want to be disturbed */
36- "clri r2 \n\t"
37- /* Load in r1 value of timer0_overflows */
38- "ld r1, %0 \n\t"
39- /* Read COUNT0 register */
40- "lr r0, [0x21] \n\t"
41- /* Read CONTROL0 register */
42- "lr r3, [0x22] \n\t"
43- /* If CONTROL0.IP is set COUNT0 reached LIMIT0 => r1 value might not be
44- * accurate => read COUNT0 again */
45- "bbit0.nt r3, 3, end \n\t"
46- /* Read COUNT0 again*/
47- "lr r0, [0x21] \n\t"
48- /* Timer0 overflowed => timer0_overflows++ */
49- "add r1, r1, 1 \n\t"
50- /***/
51- "end: \n\t"
52- "seti r2 \n\t"
53- : /* Output parameters and their constraints */
54- : "m" (timer0_overflows ) /* Input parameters and their constraints */
55- : "r0" , "r1" , "r2" , "r3" /* Killed registers */
56- );
35+ uint32_t time_stamp ;
36+ int key = interrupt_lock ();
37+ uint64_t ret = timer0_overflows ;
38+ time_stamp = aux_reg_read (ARC_V2_TMR0_COUNT );
39+ if (aux_reg_read (ARC_V2_TMR0_CONTROL ) & (0x01 << 3 )) {
40+ time_stamp = aux_reg_read (ARC_V2_TMR0_COUNT );
41+ ret ++ ;
42+ }
43+ interrupt_unlock (key );
44+ return ((ret << 32 ) | time_stamp );
5745}
5846
5947void delay (uint32_t msec )
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