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| 1 | +Index: openwrt/target/linux/ath79/dts/ar9331_dragino_lps8n.dts |
| 2 | +=================================================================== |
| 3 | +--- /dev/null |
| 4 | ++++ openwrt/target/linux/ath79/dts/ar9331_dragino_lps8n.dts |
| 5 | +@@ -0,0 +1,209 @@ |
| 6 | ++// SPDX-License-Identifier: GPL-2.0-or-later OR MIT |
| 7 | ++ |
| 8 | ++#include "ar9331.dtsi" |
| 9 | ++ |
| 10 | ++#include <dt-bindings/gpio/gpio.h> |
| 11 | ++#include <dt-bindings/input/input.h> |
| 12 | ++#include <dt-bindings/leds/common.h> |
| 13 | ++ |
| 14 | ++/ { |
| 15 | ++ model = "Dragino LPS8N"; |
| 16 | ++ compatible = "dragino,lps8n", "qca,ar9331"; |
| 17 | ++ |
| 18 | ++ aliases { |
| 19 | ++ label-mac-device = &wmac; |
| 20 | ++ spi1 = &spidev_gpio; |
| 21 | ++ }; |
| 22 | ++ |
| 23 | ++ leds { |
| 24 | ++ compatible = "gpio-leds"; |
| 25 | ++ |
| 26 | ++ wlan { |
| 27 | ++ function = LED_FUNCTION_WLAN; |
| 28 | ++ color = <LED_COLOR_ID_RED>; |
| 29 | ++ gpios = <&gpio 0 GPIO_ACTIVE_LOW>; |
| 30 | ++ linux,default-trigger = "phy0tpt"; |
| 31 | ++ }; |
| 32 | ++ |
| 33 | ++ wan { |
| 34 | ++ label = "dragino2:red:wan"; |
| 35 | ++ gpios = <&gpio 17 GPIO_ACTIVE_LOW>; |
| 36 | ++ }; |
| 37 | ++ |
| 38 | ++ lan { |
| 39 | ++ label = "dragino2:red:lan"; |
| 40 | ++ gpios = <&gpio 13 GPIO_ACTIVE_LOW>; |
| 41 | ++ }; |
| 42 | ++ |
| 43 | ++ system { |
| 44 | ++ label = "dragino2:red:system"; |
| 45 | ++ gpios = <&gpio 28 GPIO_ACTIVE_LOW>; |
| 46 | ++ }; |
| 47 | ++ }; |
| 48 | ++ |
| 49 | ++ keys { |
| 50 | ++ compatible = "gpio-keys"; |
| 51 | ++ |
| 52 | ++ wps { |
| 53 | ++ label = "wps"; |
| 54 | ++ linux,code = <KEY_WPS_BUTTON>; |
| 55 | ++ gpios = <&gpio 11 GPIO_ACTIVE_LOW>; |
| 56 | ++ debounce-interval = <60>; |
| 57 | ++ }; |
| 58 | ++ |
| 59 | ++ reset { |
| 60 | ++ label = "reset"; |
| 61 | ++ linux,code = <KEY_RESTART>; |
| 62 | ++ gpios = <&gpio 12 GPIO_ACTIVE_LOW>; |
| 63 | ++ debounce-interval = <60>; |
| 64 | ++ }; |
| 65 | ++ }; |
| 66 | ++ |
| 67 | ++ /* Software SPI for SX1302 + SX1250 (GPIO18 MOSI, GPIO20 MISO, GPIO24 SCK, GPIO19 CSN)*/ |
| 68 | ++ spidev_gpio: spi-gpio { |
| 69 | ++ compatible = "spi-gpio"; |
| 70 | ++ #address-cells = <1>; |
| 71 | ++ #size-cells = <0>; |
| 72 | ++ status = "okay"; |
| 73 | ++ |
| 74 | ++ sck-gpios = <&gpio 24 GPIO_ACTIVE_HIGH>; |
| 75 | ++ mosi-gpios = <&gpio 18 GPIO_ACTIVE_HIGH>; |
| 76 | ++ miso-gpios = <&gpio 20 GPIO_ACTIVE_HIGH>; |
| 77 | ++ cs-gpios = <&gpio 19 GPIO_ACTIVE_LOW>; |
| 78 | ++ |
| 79 | ++ spidev@0 { |
| 80 | ++ compatible = "rohm,dh2228fv"; |
| 81 | ++ status = "okay"; |
| 82 | ++ reg = <0>; |
| 83 | ++ spi-max-frequency = <2000000>; |
| 84 | ++ }; |
| 85 | ++ }; |
| 86 | ++ |
| 87 | ++ /* Bit-banged I2C on GPIO7 (SDA) and GPIO8 (SCL) */ |
| 88 | ++ i2c_gpio: i2c-gpio { |
| 89 | ++ compatible = "i2c-gpio"; |
| 90 | ++ #address-cells = <1>; |
| 91 | ++ #size-cells = <0>; |
| 92 | ++ status = "okay"; |
| 93 | ++ |
| 94 | ++ sda-gpios = <&gpio 7 GPIO_ACTIVE_HIGH>; |
| 95 | ++ scl-gpios = <&gpio 8 GPIO_ACTIVE_HIGH>; |
| 96 | ++ i2c-gpio,delay-us = <5>; |
| 97 | ++ }; |
| 98 | ++ |
| 99 | ++ /* Assume VBUS always present */ |
| 100 | ++ reg_usb_vbus: regulator-usb-vbus { |
| 101 | ++ compatible = "regulator-fixed"; |
| 102 | ++ regulator-name = "usb_vbus"; |
| 103 | ++ regulator-min-microvolt = <5000000>; |
| 104 | ++ regulator-max-microvolt = <5000000>; |
| 105 | ++ regulator-always-on; |
| 106 | ++ }; |
| 107 | ++}; |
| 108 | ++ |
| 109 | ++&ref { |
| 110 | ++ clock-frequency = <40000000>; |
| 111 | ++}; |
| 112 | ++ |
| 113 | ++/* Remove gpio-hog on reset pin; concentratord will control it via UCI */ |
| 114 | ++ |
| 115 | ++&usb { |
| 116 | ++ dr_mode = "host"; |
| 117 | ++ vbus-supply = <®_usb_vbus>; |
| 118 | ++ status = "okay"; |
| 119 | ++}; |
| 120 | ++ |
| 121 | ++&usb_phy { |
| 122 | ++ /* Some kernels expect the first reset name to be "phy" instead of "usb-phy" */ |
| 123 | ++ reset-names = "phy", "usb-suspend-override"; |
| 124 | ++ resets = <&rst 4>, <&rst 3>; |
| 125 | ++ status = "okay"; |
| 126 | ++}; |
| 127 | ++ |
| 128 | ++&spi { |
| 129 | ++ status = "okay"; |
| 130 | ++ |
| 131 | ++ flash@0 { |
| 132 | ++ compatible = "jedec,spi-nor"; |
| 133 | ++ spi-max-frequency = <50000000>; |
| 134 | ++ reg = <0>; |
| 135 | ++ |
| 136 | ++ partitions { |
| 137 | ++ compatible = "fixed-partitions"; |
| 138 | ++ #address-cells = <1>; |
| 139 | ++ #size-cells = <1>; |
| 140 | ++ |
| 141 | ++ uboot: partition@0 { |
| 142 | ++ label = "u-boot"; |
| 143 | ++ reg = <0x000000 0x040000>; // 256k |
| 144 | ++ read-only; |
| 145 | ++ }; |
| 146 | ++ |
| 147 | ++ firmware: partition@40000 { |
| 148 | ++ compatible = "denx,uimage"; |
| 149 | ++ label = "firmware"; |
| 150 | ++ reg = <0x040000 0xFA0000>; // 16000k |
| 151 | ++ }; |
| 152 | ++ |
| 153 | ++ config: partition@fe0000 { |
| 154 | ++ label = "config"; |
| 155 | ++ reg = <0xFE0000 0x010000>; // 64k |
| 156 | ++ }; |
| 157 | ++ |
| 158 | ++ art: partition@ff0000 { |
| 159 | ++ label = "art"; |
| 160 | ++ reg = <0xFF0000 0x010000>; // 64k |
| 161 | ++ read-only; |
| 162 | ++ |
| 163 | ++ nvmem-layout { |
| 164 | ++ compatible = "fixed-layout"; |
| 165 | ++ #address-cells = <1>; |
| 166 | ++ #size-cells = <1>; |
| 167 | ++ |
| 168 | ++ macaddr_art_0: macaddr@0 { |
| 169 | ++ reg = <0x0 0x6>; |
| 170 | ++ }; |
| 171 | ++ |
| 172 | ++ macaddr_art_6: macaddr@6 { |
| 173 | ++ reg = <0x6 0x6>; |
| 174 | ++ }; |
| 175 | ++ |
| 176 | ++ cal_art_1000: calibration@1000 { |
| 177 | ++ reg = <0x1000 0x440>; |
| 178 | ++ }; |
| 179 | ++ }; |
| 180 | ++ }; |
| 181 | ++ }; |
| 182 | ++ }; |
| 183 | ++}; |
| 184 | ++ |
| 185 | ++&mdio0 { |
| 186 | ++ status = "okay"; |
| 187 | ++}; |
| 188 | ++ |
| 189 | ++ð0 { |
| 190 | ++ status = "okay"; |
| 191 | ++ |
| 192 | ++ nvmem-cells = <&macaddr_art_0>; |
| 193 | ++ nvmem-cell-names = "mac-address"; |
| 194 | ++ |
| 195 | ++ gmac-config { |
| 196 | ++ device = <&gmac>; |
| 197 | ++ switch-phy-addr-swap = <1>; |
| 198 | ++ switch-phy-swap = <1>; |
| 199 | ++ }; |
| 200 | ++}; |
| 201 | ++ |
| 202 | ++ð1 { |
| 203 | ++ status = "okay"; |
| 204 | ++ |
| 205 | ++ nvmem-cells = <&macaddr_art_6>; |
| 206 | ++ nvmem-cell-names = "mac-address"; |
| 207 | ++}; |
| 208 | ++ |
| 209 | ++&wmac { |
| 210 | ++ status = "okay"; |
| 211 | ++ |
| 212 | ++ nvmem-cells = <&macaddr_art_6>, <&cal_art_1000>; |
| 213 | ++ nvmem-cell-names = "mac-address", "calibration"; |
| 214 | ++}; |
| 215 | +Index: openwrt/target/linux/ath79/generic/base-files/etc/board.d/01_leds |
| 216 | +=================================================================== |
| 217 | +--- openwrt.orig/target/linux/ath79/generic/base-files/etc/board.d/01_leds |
| 218 | ++++ openwrt/target/linux/ath79/generic/base-files/etc/board.d/01_leds |
| 219 | +@@ -6,6 +6,11 @@ board_config_update |
| 220 | + board=$(board_name) |
| 221 | + |
| 222 | + case "$board" in |
| 223 | ++dragino,lps8n) |
| 224 | ++ ucidef_set_led_wlan "wlan" "WLAN" "red:wlan" "phy0tpt" |
| 225 | ++ ucidef_set_led_netdev "lan" "LAN" "dragino2:red:lan" "eth0" |
| 226 | ++ ucidef_set_led_netdev "wan" "WAN" "dragino2:red:wan" "eth1" |
| 227 | ++ ;; |
| 228 | + 8dev,carambola2) |
| 229 | + ucidef_set_led_netdev "lan" "LAN" "orange:eth0" "eth0" |
| 230 | + ucidef_set_led_switch "wan" "WAN" "orange:eth1" "switch0" "0x04" |
| 231 | +Index: openwrt/target/linux/ath79/generic/base-files/etc/board.d/02_network |
| 232 | +=================================================================== |
| 233 | +--- openwrt.orig/target/linux/ath79/generic/base-files/etc/board.d/02_network |
| 234 | ++++ openwrt/target/linux/ath79/generic/base-files/etc/board.d/02_network |
| 235 | +@@ -19,6 +19,7 @@ ath79_setup_interfaces() |
| 236 | + araknis,an-500-ap-i-ac|\ |
| 237 | + araknis,an-700-ap-i-ac|\ |
| 238 | + arduino,yun|\ |
| 239 | ++ dragino,lps8n|\ |
| 240 | + aruba,ap-105|\ |
| 241 | + aruba,ap-175|\ |
| 242 | + asus,rp-ac51|\ |
| 243 | +Index: openwrt/target/linux/ath79/generic/base-files/etc/hotplug.d/firmware/10-ath9k-eeprom |
| 244 | +=================================================================== |
| 245 | +--- openwrt.orig/target/linux/ath79/generic/base-files/etc/hotplug.d/firmware/10-ath9k-eeprom |
| 246 | ++++ openwrt/target/linux/ath79/generic/base-files/etc/hotplug.d/firmware/10-ath9k-eeprom |
| 247 | +@@ -63,6 +63,9 @@ case "$FIRMWARE" in |
| 248 | + base_mac=$(mtd_get_mac_encrypted_deco $(find_mtd_part config)) |
| 249 | + ath9k_patch_mac $(macaddr_add $base_mac 1) |
| 250 | + ;; |
| 251 | ++ dragino,lps8n) |
| 252 | ++ caldata_extract "art" 0x1000 0x440 |
| 253 | ++ ;; |
| 254 | + *) |
| 255 | + caldata_die "board $board is not supported yet" |
| 256 | + ;; |
| 257 | +Index: openwrt/target/linux/ath79/image/generic.mk |
| 258 | +=================================================================== |
| 259 | +--- openwrt.orig/target/linux/ath79/image/generic.mk |
| 260 | ++++ openwrt/target/linux/ath79/image/generic.mk |
| 261 | +@@ -3414,3 +3414,13 @@ define Device/zyxel_nbg6616 |
| 262 | + SUPPORTED_DEVICES += nbg6616 |
| 263 | + endef |
| 264 | + TARGET_DEVICES += zyxel_nbg6616 |
| 265 | ++ |
| 266 | ++define Device/dragino_lps8n |
| 267 | ++ SOC := ar9331 |
| 268 | ++ DEVICE_VENDOR := Dragino |
| 269 | ++ DEVICE_MODEL := LPS8N |
| 270 | ++ DEVICE_PACKAGES := kmod-usb-chipidea2 kmod-usb-ledtrig-usbport |
| 271 | ++ IMAGE_SIZE := 16000k |
| 272 | ++ SUPPORTED_DEVICES += dragino2 |
| 273 | ++endef |
| 274 | ++TARGET_DEVICES += dragino_lps8n |
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