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Jakub Ramaseuski
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RDMA/ionic: Register auxiliary module for ionic ethernet adapter
JIRA: https://issues.redhat.com/browse/RHEL-121486 commit 8d765af Author: Abhijit Gangurde <abhijit.gangurde@amd.com> Date: Wed Sep 3 11:46:00 2025 +0530 RDMA/ionic: Register auxiliary module for ionic ethernet adapter Register auxiliary module to create ibdevice for ionic ethernet adapter. Co-developed-by: Andrew Boyer <andrew.boyer@amd.com> Signed-off-by: Andrew Boyer <andrew.boyer@amd.com> Co-developed-by: Allen Hubbe <allen.hubbe@amd.com> Signed-off-by: Allen Hubbe <allen.hubbe@amd.com> Signed-off-by: Abhijit Gangurde <abhijit.gangurde@amd.com> Link: https://patch.msgid.link/20250903061606.4139957-9-abhijit.gangurde@amd.com Signed-off-by: Leon Romanovsky <leon@kernel.org> Signed-off-by: Jakub Ramaseuski <jramaseu@redhat.com>
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‎drivers/infiniband/hw/ionic/ionic_ibdev.c‎

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// SPDX-License-Identifier: GPL-2.0
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/* Copyright (C) 2018-2025, Advanced Micro Devices, Inc. */
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#include <linux/module.h>
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#include <linux/printk.h>
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#include <net/addrconf.h>
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#include "ionic_ibdev.h"
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#define DRIVER_DESCRIPTION "AMD Pensando RoCE HCA driver"
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#define DEVICE_DESCRIPTION "AMD Pensando RoCE HCA"
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MODULE_AUTHOR("Allen Hubbe <allen.hubbe@amd.com>");
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MODULE_DESCRIPTION(DRIVER_DESCRIPTION);
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MODULE_LICENSE("GPL");
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MODULE_IMPORT_NS("NET_IONIC");
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static void ionic_destroy_ibdev(struct ionic_ibdev *dev)
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{
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ib_unregister_device(&dev->ibdev);
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ib_dealloc_device(&dev->ibdev);
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}
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static struct ionic_ibdev *ionic_create_ibdev(struct ionic_aux_dev *ionic_adev)
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{
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struct ib_device *ibdev;
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struct ionic_ibdev *dev;
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struct net_device *ndev;
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int rc;
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dev = ib_alloc_device(ionic_ibdev, ibdev);
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if (!dev)
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return ERR_PTR(-EINVAL);
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ionic_fill_lif_cfg(ionic_adev->lif, &dev->lif_cfg);
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ibdev = &dev->ibdev;
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ibdev->dev.parent = dev->lif_cfg.hwdev;
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strscpy(ibdev->name, "ionic_%d", IB_DEVICE_NAME_MAX);
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strscpy(ibdev->node_desc, DEVICE_DESCRIPTION, IB_DEVICE_NODE_DESC_MAX);
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ibdev->node_type = RDMA_NODE_IB_CA;
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ibdev->phys_port_cnt = 1;
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/* the first two eq are reserved for async events */
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ibdev->num_comp_vectors = dev->lif_cfg.eq_count - 2;
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ndev = ionic_lif_netdev(ionic_adev->lif);
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addrconf_ifid_eui48((u8 *)&ibdev->node_guid, ndev);
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rc = ib_device_set_netdev(ibdev, ndev, 1);
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/* ionic_lif_netdev() returns ndev with refcount held */
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dev_put(ndev);
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if (rc)
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goto err_admin;
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rc = ib_register_device(ibdev, "ionic_%d", ibdev->dev.parent);
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if (rc)
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goto err_register;
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return dev;
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err_register:
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err_admin:
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ib_dealloc_device(&dev->ibdev);
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return ERR_PTR(rc);
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}
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static int ionic_aux_probe(struct auxiliary_device *adev,
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const struct auxiliary_device_id *id)
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{
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struct ionic_aux_dev *ionic_adev;
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struct ionic_ibdev *dev;
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ionic_adev = container_of(adev, struct ionic_aux_dev, adev);
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dev = ionic_create_ibdev(ionic_adev);
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if (IS_ERR(dev))
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return dev_err_probe(&adev->dev, PTR_ERR(dev),
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"Failed to register ibdev\n");
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auxiliary_set_drvdata(adev, dev);
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ibdev_dbg(&dev->ibdev, "registered\n");
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return 0;
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}
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static void ionic_aux_remove(struct auxiliary_device *adev)
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{
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struct ionic_ibdev *dev = auxiliary_get_drvdata(adev);
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dev_dbg(&adev->dev, "unregister ibdev\n");
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ionic_destroy_ibdev(dev);
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dev_dbg(&adev->dev, "unregistered\n");
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}
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static const struct auxiliary_device_id ionic_aux_id_table[] = {
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{ .name = "ionic.rdma", },
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{},
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};
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MODULE_DEVICE_TABLE(auxiliary, ionic_aux_id_table);
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static struct auxiliary_driver ionic_aux_r_driver = {
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.name = "rdma",
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.probe = ionic_aux_probe,
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.remove = ionic_aux_remove,
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.id_table = ionic_aux_id_table,
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};
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static int __init ionic_mod_init(void)
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{
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int rc;
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rc = auxiliary_driver_register(&ionic_aux_r_driver);
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if (rc)
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goto err_aux;
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return 0;
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err_aux:
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return rc;
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}
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static void __exit ionic_mod_exit(void)
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{
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auxiliary_driver_unregister(&ionic_aux_r_driver);
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}
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module_init(ionic_mod_init);
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module_exit(ionic_mod_exit);

‎drivers/infiniband/hw/ionic/ionic_ibdev.h‎

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/* SPDX-License-Identifier: GPL-2.0 */
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/* Copyright (C) 2018-2025, Advanced Micro Devices, Inc. */
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#ifndef _IONIC_IBDEV_H_
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#define _IONIC_IBDEV_H_
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#include <rdma/ib_verbs.h>
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#include <ionic_api.h>
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#include "ionic_lif_cfg.h"
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struct ionic_ibdev {
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struct ib_device ibdev;
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struct ionic_lif_cfg lif_cfg;
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};
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#endif /* _IONIC_IBDEV_H_ */

‎drivers/infiniband/hw/ionic/ionic_lif_cfg.c‎

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// SPDX-License-Identifier: GPL-2.0
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/* Copyright (C) 2018-2025, Advanced Micro Devices, Inc. */
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#include <linux/kernel.h>
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#include <ionic.h>
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#include <ionic_lif.h>
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#include "ionic_lif_cfg.h"
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#define IONIC_MIN_RDMA_VERSION 0
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#define IONIC_MAX_RDMA_VERSION 2
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static u8 ionic_get_expdb(struct ionic_lif *lif)
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{
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u8 expdb_support = 0;
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if (lif->ionic->idev.phy_cmb_expdb64_pages)
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expdb_support |= IONIC_EXPDB_64B_WQE;
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if (lif->ionic->idev.phy_cmb_expdb128_pages)
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expdb_support |= IONIC_EXPDB_128B_WQE;
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if (lif->ionic->idev.phy_cmb_expdb256_pages)
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expdb_support |= IONIC_EXPDB_256B_WQE;
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if (lif->ionic->idev.phy_cmb_expdb512_pages)
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expdb_support |= IONIC_EXPDB_512B_WQE;
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return expdb_support;
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}
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void ionic_fill_lif_cfg(struct ionic_lif *lif, struct ionic_lif_cfg *cfg)
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{
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union ionic_lif_identity *ident = &lif->ionic->ident.lif;
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cfg->lif = lif;
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cfg->hwdev = &lif->ionic->pdev->dev;
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cfg->lif_index = lif->index;
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cfg->lif_hw_index = lif->hw_index;
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cfg->dbid = lif->kern_pid;
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cfg->dbid_count = le32_to_cpu(lif->ionic->ident.dev.ndbpgs_per_lif);
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cfg->dbpage = lif->kern_dbpage;
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cfg->intr_ctrl = lif->ionic->idev.intr_ctrl;
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cfg->db_phys = lif->ionic->bars[IONIC_PCI_BAR_DBELL].bus_addr;
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if (IONIC_VERSION(ident->rdma.version, ident->rdma.minor_version) >=
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IONIC_VERSION(2, 1))
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cfg->page_size_supported =
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le64_to_cpu(ident->rdma.page_size_cap);
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else
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cfg->page_size_supported = IONIC_PAGE_SIZE_SUPPORTED;
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cfg->rdma_version = ident->rdma.version;
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cfg->qp_opcodes = ident->rdma.qp_opcodes;
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cfg->admin_opcodes = ident->rdma.admin_opcodes;
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cfg->stats_type = le16_to_cpu(ident->rdma.stats_type);
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cfg->npts_per_lif = le32_to_cpu(ident->rdma.npts_per_lif);
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cfg->nmrs_per_lif = le32_to_cpu(ident->rdma.nmrs_per_lif);
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cfg->nahs_per_lif = le32_to_cpu(ident->rdma.nahs_per_lif);
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cfg->aq_base = le32_to_cpu(ident->rdma.aq_qtype.qid_base);
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cfg->cq_base = le32_to_cpu(ident->rdma.cq_qtype.qid_base);
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cfg->eq_base = le32_to_cpu(ident->rdma.eq_qtype.qid_base);
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/*
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* ionic_create_rdma_admin() may reduce aq_count or eq_count if
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* it is unable to allocate all that were requested.
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* aq_count is tunable; see ionic_aq_count
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* eq_count is tunable; see ionic_eq_count
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*/
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cfg->aq_count = le32_to_cpu(ident->rdma.aq_qtype.qid_count);
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cfg->eq_count = le32_to_cpu(ident->rdma.eq_qtype.qid_count);
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cfg->cq_count = le32_to_cpu(ident->rdma.cq_qtype.qid_count);
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cfg->qp_count = le32_to_cpu(ident->rdma.sq_qtype.qid_count);
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cfg->dbid_count = le32_to_cpu(lif->ionic->ident.dev.ndbpgs_per_lif);
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cfg->aq_qtype = ident->rdma.aq_qtype.qtype;
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cfg->sq_qtype = ident->rdma.sq_qtype.qtype;
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cfg->rq_qtype = ident->rdma.rq_qtype.qtype;
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cfg->cq_qtype = ident->rdma.cq_qtype.qtype;
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cfg->eq_qtype = ident->rdma.eq_qtype.qtype;
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cfg->udma_qgrp_shift = ident->rdma.udma_shift;
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cfg->udma_count = 2;
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cfg->max_stride = ident->rdma.max_stride;
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cfg->expdb_mask = ionic_get_expdb(lif);
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cfg->sq_expdb =
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!!(lif->qtype_info[IONIC_QTYPE_TXQ].features & IONIC_QIDENT_F_EXPDB);
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cfg->rq_expdb =
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!!(lif->qtype_info[IONIC_QTYPE_RXQ].features & IONIC_QIDENT_F_EXPDB);
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}
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struct net_device *ionic_lif_netdev(struct ionic_lif *lif)
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{
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struct net_device *netdev = lif->netdev;
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dev_hold(netdev);
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return netdev;
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}

‎drivers/infiniband/hw/ionic/ionic_lif_cfg.h‎

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/* SPDX-License-Identifier: GPL-2.0 */
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/* Copyright (C) 2018-2025, Advanced Micro Devices, Inc. */
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#ifndef _IONIC_LIF_CFG_H_
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#define IONIC_VERSION(a, b) (((a) << 16) + ((b) << 8))
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#define IONIC_PAGE_SIZE_SUPPORTED 0x40201000 /* 4kb, 2Mb, 1Gb */
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#define IONIC_EXPDB_64B_WQE BIT(0)
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#define IONIC_EXPDB_128B_WQE BIT(1)
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#define IONIC_EXPDB_256B_WQE BIT(2)
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#define IONIC_EXPDB_512B_WQE BIT(3)
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struct ionic_lif_cfg {
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struct device *hwdev;
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struct ionic_lif *lif;
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int lif_index;
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int lif_hw_index;
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u32 dbid;
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int dbid_count;
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u64 __iomem *dbpage;
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struct ionic_intr __iomem *intr_ctrl;
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phys_addr_t db_phys;
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u64 page_size_supported;
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u32 npts_per_lif;
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u32 nmrs_per_lif;
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u32 nahs_per_lif;
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u32 aq_base;
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u32 cq_base;
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u32 eq_base;
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int aq_count;
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int eq_count;
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int cq_count;
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int qp_count;
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u16 stats_type;
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u8 aq_qtype;
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u8 sq_qtype;
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u8 rq_qtype;
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u8 cq_qtype;
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u8 eq_qtype;
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u8 udma_count;
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u8 udma_qgrp_shift;
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u8 rdma_version;
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u8 qp_opcodes;
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u8 admin_opcodes;
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u8 max_stride;
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bool sq_expdb;
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bool rq_expdb;
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u8 expdb_mask;
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};
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void ionic_fill_lif_cfg(struct ionic_lif *lif, struct ionic_lif_cfg *cfg);
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struct net_device *ionic_lif_netdev(struct ionic_lif *lif);
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#endif /* _IONIC_LIF_CFG_H_ */

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