Skip to content

Commit b57d53b

Browse files
committed
[CIR] Revert unintented part of last commit
1 parent 84ee34f commit b57d53b

File tree

1 file changed

+7
-32
lines changed

1 file changed

+7
-32
lines changed

clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp

Lines changed: 7 additions & 32 deletions
Original file line numberDiff line numberDiff line change
@@ -1132,40 +1132,15 @@ mlir::LogicalResult CIRToLLVMGetElementOpLowering::matchAndRewrite(
11321132
mlir::isa<mlir::LLVM::LLVMFunctionType>(elementTy))
11331133
elementTy = mlir::IntegerType::get(ctx, 8, mlir::IntegerType::Signless);
11341134

1135-
// Zero-extend, sign-extend or trunc the pointer value.
1135+
// Zero-extend, sign-extend or trunc the index value.
11361136
auto index = adaptor.getIndex();
1137-
auto width = mlir::cast<mlir::IntegerType>(index.getType()).getWidth();
11381137
mlir::DataLayout LLVMLayout(op->getParentOfType<mlir::ModuleOp>());
1139-
auto layoutWidth =
1140-
LLVMLayout.getTypeIndexBitwidth(adaptor.getBase().getType());
1141-
auto indexOp = index.getDefiningOp();
1142-
if (indexOp && layoutWidth && width != *layoutWidth) {
1143-
// If the index comes from a subtraction, make sure the extension happens
1144-
// before it. To achieve that, look at unary minus, which already got
1145-
// lowered to "sub 0, x".
1146-
auto sub = dyn_cast<mlir::LLVM::SubOp>(indexOp);
1147-
auto unary =
1148-
dyn_cast_if_present<cir::UnaryOp>(op.getIndex().getDefiningOp());
1149-
bool rewriteSub =
1150-
unary && unary.getKind() == cir::UnaryOpKind::Minus && sub;
1151-
if (rewriteSub)
1152-
index = indexOp->getOperand(1);
1153-
1154-
// Handle the cast
1155-
auto llvmDstType = mlir::IntegerType::get(ctx, *layoutWidth);
1156-
index = getLLVMIntCast(rewriter, index, llvmDstType,
1157-
op.getIndex().getType().isUnsigned(), width,
1158-
*layoutWidth);
1159-
1160-
// Rewrite the sub in front of extensions/trunc
1161-
if (rewriteSub) {
1162-
index = mlir::LLVM::SubOp::create(
1163-
rewriter, index.getLoc(),
1164-
mlir::LLVM::ConstantOp::create(rewriter, index.getLoc(),
1165-
index.getType(), 0),
1166-
index);
1167-
rewriter.eraseOp(sub);
1168-
}
1138+
if (auto layoutWidth =
1139+
LLVMLayout.getTypeIndexBitwidth(adaptor.getBase().getType())) {
1140+
bool isUnsigned = false;
1141+
if (auto strideTy = dyn_cast<cir::IntType>(op.getOperand(1).getType()))
1142+
isUnsigned = strideTy.isUnsigned();
1143+
index = promoteIndex(rewriter, index, *layoutWidth, isUnsigned);
11691144
}
11701145

11711146
// Since the base address is a pointer to an aggregate, the first

0 commit comments

Comments
 (0)