@@ -65,7 +65,7 @@ Non-comprehensive list of changes in this release
6565 with optimizations enabled.
6666
6767* ``Callbacks `` have been added to ``CommandLine Options ``. These can
68- be used to validate of selectively enable other options.
68+ be used to validate or selectively enable other options.
6969
7070* The function attributes ``no-frame-pointer-elim `` and
7171 ``no-frame-pointer-elim-non-leaf `` have been replaced by ``frame-pointer ``,
@@ -77,7 +77,7 @@ Non-comprehensive list of changes in this release
7777 `D59918 <https://reviews.llvm.org/D59918 >`_, `LLVM-Dev talk <https://youtu.be/CzWkc_JcfS0 >`_).
7878 In this release, 19 different attributes are inferred, including 12 LLVM IR
7979 attributes and 7 "abstract" attributes, such as liveness. The Attributor is
80- still under heavy development and disabled by default, to enable an early run
80+ still under heavy development and disabled by default; to enable an early run
8181 pass ``-mllvm -attributor-disable=false `` to an invocation of clang.
8282
8383* New matrix math intrinsics have been added to LLVM
@@ -154,33 +154,33 @@ Changes to the PowerPC Target
154154
155155Optimization:
156156
157- * Improved register pressure estimates in the loop vectorizer based on type
157+ * Improved register pressure estimates in the loop vectorizer based on type
158158
159- * Improved the PowerPC cost model for the vectorizer
159+ * Improved the PowerPC cost model for the vectorizer
160160
161- * Enabled vectorization of math routines on PowerPC using MASSV (Mathematical Acceleration SubSystem) library
161+ * Enabled vectorization of math routines on PowerPC using MASSV (Mathematical Acceleration SubSystem) library
162162
163- compiler -rt:
163+ copiler -rt:
164164
165- * Added/improved conversion functions from IBM long double to 128-bit integers
165+ * Added/improved conversion functions from IBM long double to 128-bit integers
166166
167167Codegen:
168168
169- * Optimized memory access instructions in loops (pertaining to update-form instructions and address computation)
169+ * Optimized memory access instructions in loops (pertaining to update-form instructions and address computation)
170170
171- * Added options to disable hoisting instructions to hotter blocks based on statically or profile-based block hotness estimates
171+ * Added options to disable hoisting instructions to hotter blocks based on statically or profile-based block hotness estimates
172172
173- * Code generation improvements (particularly with floating point and vector code as well as handling condition registers)
173+ * Code generation improvements (particularly with floating point and vector code as well as handling condition registers)
174174
175- * Various infrastructural improvements, code refactoring, and bug fixes
175+ * Various infrastructural improvements, code refactoring, and bug fixes
176176
177- * Optimized handling of control flow based on multiple comparison of same values
177+ * Optimized handling of control flow based on multiple comparison of same values
178178
179179Tools:
180180
181- * llvm-readobj supports displaying file header, section headers, symbol table and relocation entries for XCOFF object files
181+ * llvm-readobj supports displaying file header, section headers, symbol table and relocation entries for XCOFF object files
182182
183- * llvm-objdump supports disassembling physical sections for XCOFF object files
183+ * llvm-objdump supports disassembling physical sections for XCOFF object files
184184
185185
186186Changes to the SystemZ Target
@@ -203,9 +203,7 @@ Changes to the SystemZ Target
203203Changes to the X86 Target
204204-------------------------
205205
206- During this release ...
207-
208- * Less than 128 bit vector types, v2i32, v4i16, v2i16, v8i8, v4i8, and v2i8, are
206+ * Less-than-128-bit vector types, v2i32, v4i16, v2i16, v8i8, v4i8, and v2i8, are
209207 now stored in the lower bits of an xmm register and the upper bits are
210208 undefined. Previously the elements were spread apart with undefined bits in
211209 between them.
@@ -287,6 +285,7 @@ New Features:
287285 than the ABI register names.
288286
289287Improvements:
288+
290289* Trap and Debugtrap now lower to RISC-V-specific trap instructions.
291290
292291* LLVM IR Inline assembly now supports using ABI register names and using
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