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royabeanroyabean
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Pull request #35: Develop
Merge in MCU16CE/pic24-dspic-can-canfd-bootloader from develop to master * commit '17a1b5e0ad79c6570ba3f419fa73a17251aa6262': switch to on board crystal Switch to Xc16 2.0 update for latest DFP Update for XC16 2.0 support ignore project build files ignore compiler files Correcting clock configuration range
2 parents 98f6f7b + 17a1b5e commit 43e7e4c

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lines changed

25 files changed

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‎.gitignore‎

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/dspic33ep-can2.0b/boot.X/.generated_files
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/dspic33ep-can2.0b/app.X/.generated_files
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/dspic33ck-canfd-ta100/boot.X/.generated_files
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/dspic33ck-canfd-ta100/app.X/.generated_files
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/dspic33ck-canfd/boot.X/.generated_files
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/dspic33ck-canfd/app.X/.generated_files
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/dspic33ck-can/boot.X/.generated_files
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/dspic33ck-can/app.X/.generated_files
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/dspic33ck-can/boot.X/build
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/dspic33ck-can/boot.X/dist
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/dspic33ck-can/boot.X/nbproject/private
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/dspic33ck-can/boot.X/nbproject/Makefile-local-default.mk
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/dspic33ck-can/boot.X/nbproject/Makefile-variables.mk
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/dspic33ck-can/boot.X/nbproject/Package-default.bash
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/dspic33ck-can/boot.X/nbproject/Makefile-default.mk
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/dspic33ck-can/boot.X/nbproject/Makefile-genesis.properties
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/dspic33ck-can/boot.X/nbproject/Makefile-impl.mk
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/dspic33ck-can/app.X/build
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/dspic33ck-can/app.X/dist
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/dspic33ck-can/app.X/nbproject/private
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/dspic33ck-can/app.X/nbproject/Makefile-local-default.mk
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/dspic33ck-can/app.X/nbproject/Makefile-variables.mk
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/dspic33ck-can/app.X/nbproject/Package-default.bash
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/dspic33ck-can/app.X/nbproject/Makefile-default.mk
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/dspic33ck-can/app.X/nbproject/Makefile-genesis.properties
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/dspic33ck-can/app.X/nbproject/Makefile-impl.mk
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/dspic33ck-canfd/boot.X/build
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/dspic33ck-canfd/boot.X/dist
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/dspic33ck-canfd/boot.X/nbproject/private
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/dspic33ck-canfd/boot.X/nbproject/Makefile-local-default.mk
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/dspic33ck-canfd/boot.X/nbproject/Makefile-variables.mk
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/dspic33ck-canfd/boot.X/nbproject/Package-default.bash
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/dspic33ck-canfd/boot.X/nbproject/Makefile-default.mk
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/dspic33ck-canfd/boot.X/nbproject/Makefile-genesis.properties
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/dspic33ck-canfd/boot.X/nbproject/Makefile-impl.mk
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/dspic33ck-canfd/app.X/build
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/dspic33ck-canfd/app.X/dist
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/dspic33ck-canfd/app.X/nbproject/private
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/dspic33ck-canfd/app.X/nbproject/Makefile-variables.mk
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/dspic33ck-canfd/app.X/nbproject/Package-default.bash
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/dspic33ck-canfd/app.X/nbproject/Makefile-default.mk
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/dspic33ck-canfd/app.X/nbproject/Makefile-genesis.properties
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/dspic33ck-canfd/app.X/nbproject/Makefile-impl.mk
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/dspic33ck-canfd/app.X/nbproject/Makefile-local-default.mk
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/dspic33ck-canfd-ta100/boot.X/build
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/dspic33ck-canfd-ta100/boot.X/dist
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/dspic33ck-canfd-ta100/boot.X/nbproject/private
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/dspic33ck-canfd-ta100/boot.X/nbproject/Makefile-local-default.mk
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/dspic33ck-canfd-ta100/boot.X/nbproject/Makefile-variables.mk
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/dspic33ck-canfd-ta100/boot.X/nbproject/Package-default.bash
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/dspic33ck-canfd-ta100/boot.X/nbproject/Makefile-default.mk
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/dspic33ck-canfd-ta100/boot.X/nbproject/Makefile-genesis.properties
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/dspic33ck-canfd-ta100/boot.X/nbproject/Makefile-impl.mk
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/dspic33ck-canfd-ta100/app.X/build
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/dspic33ck-canfd-ta100/app.X/dist
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/dspic33ck-canfd-ta100/app.X/nbproject/private
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/dspic33ck-canfd-ta100/app.X/nbproject/Makefile-local-default.mk
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/dspic33ck-canfd-ta100/app.X/nbproject/Makefile-variables.mk
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/dspic33ck-canfd-ta100/app.X/nbproject/Package-default.bash
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/dspic33ck-canfd-ta100/app.X/nbproject/Makefile-default.mk
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/dspic33ck-canfd-ta100/app.X/nbproject/Makefile-genesis.properties
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/dspic33ck-canfd-ta100/app.X/nbproject/Makefile-impl.mk
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/dspic33ep-can2.0b/boot.X/build
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/dspic33ep-can2.0b/boot.X/dist
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/dspic33ep-can2.0b/boot.X/nbproject/private
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/dspic33ep-can2.0b/boot.X/nbproject/Makefile-local-default.mk
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/dspic33ep-can2.0b/boot.X/nbproject/Makefile-variables.mk
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/dspic33ep-can2.0b/boot.X/nbproject/Makefile-default.mk
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/dspic33ep-can2.0b/boot.X/nbproject/Makefile-impl.mk
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/dspic33ep-can2.0b/app.X/build
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/dspic33ep-can2.0b/app.X/dist
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/dspic33ep-can2.0b/app.X/nbproject/private
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/dspic33ep-can2.0b/app.X/nbproject/Makefile-local-default.mk
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/dspic33ep-can2.0b/app.X/nbproject/Makefile-variables.mk
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/dspic33ep-can2.0b/app.X/nbproject/Makefile-default.mk
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/dspic33ep-can2.0b/app.X/nbproject/Makefile-impl.mk

‎dspic33ck-can/app.X/mcc_generated_files/clock.c‎

Lines changed: 6 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -62,8 +62,8 @@ void CLOCK_Initialize(void)
6262
APLLFBD1 = 0x96;
6363
// APOST1DIV 1:4; APOST2DIV 1:1; AVCODIV FVCO/4;
6464
APLLDIV1 = 0x41;
65-
// CANCLKEN enabled; CANCLKSEL AFVCO/4; CANCLKDIV Divide by 15;
66-
CANCLKCON = 0x8A0E;
65+
// CANCLKEN enabled; CANCLKSEL FPLLO; CANCLKDIV Divide by 15;
66+
CANCLKCON = 0x820E;
6767
// ROEN disabled; ROSWEN disabled; ROSLP disabled; ROSEL FOSC; ROOUT disabled; ROSIDL disabled;
6868
REFOCONL = 0x00;
6969
// RODIV 0;
@@ -90,7 +90,10 @@ void CLOCK_Initialize(void)
9090
PMD8 = 0x00;
9191
// CF no clock failure; NOSC PRIPLL; CLKLOCK unlocked; OSWEN Switch is Complete;
9292
__builtin_write_OSCCONH((uint8_t) (0x03));
93-
__builtin_write_OSCCONL((uint8_t) (0x00));
93+
__builtin_write_OSCCONL((uint8_t) (0x01));
94+
// Wait for Clock switch to occur
95+
while (OSCCONbits.OSWEN != 0);
96+
while (OSCCONbits.LOCK != 1);
9497
}
9598

9699
bool CLOCK_AuxPllLockStatusGet()

‎dspic33ck-can/app.X/mcc_generated_files/system.c‎

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -58,15 +58,15 @@
5858
#pragma config BSLIM = 8191 //Boot Segment Flash Page Address Limit bits->8191
5959

6060
// FOSCSEL
61-
#pragma config FNOSC = PRIPLL //Oscillator Source Selection->Primary Oscillator with PLL module (XT + PLL, HS + PLL, EC + PLL)
62-
#pragma config IESO = ON //Two-speed Oscillator Start-up Enable bit->Start up device with FRC, then switch to user-selected oscillator source
61+
#pragma config FNOSC = FRC //Oscillator Source Selection->FRC
62+
#pragma config IESO = OFF //Two-speed Oscillator Start-up Enable bit->Start up with user-selected oscillator source
6363

6464
// FOSC
6565
#pragma config POSCMD = XT //Primary Oscillator Mode Select bits->XT Crystal Oscillator Mode
6666
#pragma config OSCIOFNC = ON //OSC2 Pin Function bit->OSC2 is general purpose digital I/O pin
67-
#pragma config FCKSM = CSDCMD //Clock Switching Mode bits->Both Clock switching and Fail-safe Clock Monitor are disabled
67+
#pragma config FCKSM = CSECMD //Clock Switching Mode bits->Clock switching is enabled,Fail-safe Clock Monitor is disabled
6868
#pragma config PLLKEN = ON //PLL Lock Status Control->PLL lock signal will be used to disable PLL clock output if lock is lost
69-
#pragma config XTCFG = G3 //XT Config->24-32 MHz crystals
69+
#pragma config XTCFG = G1 //XT Config->8-16 MHz crystals
7070
#pragma config XTBST = ENABLE //XT Boost->Boost the kick-start
7171

7272
// FWDT

‎dspic33ck-can/app.X/mcc_generated_files/traps.c‎

Lines changed: 0 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -136,18 +136,6 @@ void ERROR_HANDLER _SoftTrapError(void)
136136
TRAPS_halt_on_error(TRAPS_NVM_ERR);
137137
}
138138

139-
if(INTCON3bits.DMT)
140-
{
141-
INTCON3bits.DMT = 0; //Clear the trap flag
142-
TRAPS_halt_on_error(TRAPS_DMT_ERR);
143-
}
144-
145-
if(INTCON3bits.DAE)
146-
{
147-
INTCON3bits.DAE = 0; //Clear the trap flag
148-
TRAPS_halt_on_error(TRAPS_DAE_ERR);
149-
}
150-
151139
if(INTCON3bits.DOOVR)
152140
{
153141
INTCON3bits.DOOVR = 0; //Clear the trap flag

‎dspic33ck-can/app.X/nbproject/configurations.xml‎

Lines changed: 4 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -81,11 +81,11 @@
8181
<targetPluginBoard></targetPluginBoard>
8282
<platformTool>noID</platformTool>
8383
<languageToolchain>XC16</languageToolchain>
84-
<languageToolchainVersion>1.70</languageToolchainVersion>
84+
<languageToolchainVersion>2.00</languageToolchainVersion>
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<platform>3</platform>
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</toolsSet>
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<packs>
88-
<pack name="dsPIC33CK-MP_DFP" vendor="Microchip" version="1.6.176"/>
88+
<pack name="dsPIC33CK-MP_DFP" vendor="Microchip" version="1.7.208"/>
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</packs>
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<ScriptingSettings>
9191
</ScriptingSettings>
@@ -115,6 +115,7 @@
115115
<makeCustomizationNormalizeHexFile>false</makeCustomizationNormalizeHexFile>
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</makeCustomizationType>
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<C30>
118+
<property key="cast-align" value="false"/>
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<property key="code-model" value="default"/>
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<property key="const-model" value="default"/>
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<property key="data-model" value="default"/>
@@ -228,6 +229,7 @@
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<property key="warn-section-align" value="false"/>
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</C30-LD>
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<C30Global>
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<property key="combine-sourcefiles" value="false"/>
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<property key="common-include-directories" value=""/>
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<property key="dual-boot-partition" value="0"/>
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<property key="fast-math" value="false"/>

‎dspic33ck-can/boot.X/mcc_generated_files/clock.c‎

Lines changed: 6 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -62,8 +62,8 @@ void CLOCK_Initialize(void)
6262
APLLFBD1 = 0x96;
6363
// APOST1DIV 1:4; APOST2DIV 1:1; AVCODIV FVCO/4;
6464
APLLDIV1 = 0x41;
65-
// CANCLKEN enabled; CANCLKSEL AFVCO/4; CANCLKDIV Divide by 15;
66-
CANCLKCON = 0x8A0E;
65+
// CANCLKEN enabled; CANCLKSEL FPLLO; CANCLKDIV Divide by 15;
66+
CANCLKCON = 0x820E;
6767
// ROEN disabled; ROSWEN disabled; ROSLP disabled; ROSEL FOSC; ROOUT disabled; ROSIDL disabled;
6868
REFOCONL = 0x00;
6969
// RODIV 0;
@@ -90,7 +90,10 @@ void CLOCK_Initialize(void)
9090
PMD8 = 0x00;
9191
// CF no clock failure; NOSC PRIPLL; CLKLOCK unlocked; OSWEN Switch is Complete;
9292
__builtin_write_OSCCONH((uint8_t) (0x03));
93-
__builtin_write_OSCCONL((uint8_t) (0x00));
93+
__builtin_write_OSCCONL((uint8_t) (0x01));
94+
// Wait for Clock switch to occur
95+
while (OSCCONbits.OSWEN != 0);
96+
while (OSCCONbits.LOCK != 1);
9497
}
9598

9699
bool CLOCK_AuxPllLockStatusGet()

‎dspic33ck-can/boot.X/mcc_generated_files/system.c‎

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -58,15 +58,15 @@
5858
#pragma config BSLIM = 8191 //Boot Segment Flash Page Address Limit bits->8191
5959

6060
// FOSCSEL
61-
#pragma config FNOSC = PRIPLL //Oscillator Source Selection->Primary Oscillator with PLL module (XT + PLL, HS + PLL, EC + PLL)
62-
#pragma config IESO = ON //Two-speed Oscillator Start-up Enable bit->Start up device with FRC, then switch to user-selected oscillator source
61+
#pragma config FNOSC = FRC //Oscillator Source Selection->FRC
62+
#pragma config IESO = OFF //Two-speed Oscillator Start-up Enable bit->Start up with user-selected oscillator source
6363

6464
// FOSC
6565
#pragma config POSCMD = XT //Primary Oscillator Mode Select bits->XT Crystal Oscillator Mode
6666
#pragma config OSCIOFNC = ON //OSC2 Pin Function bit->OSC2 is general purpose digital I/O pin
67-
#pragma config FCKSM = CSDCMD //Clock Switching Mode bits->Both Clock switching and Fail-safe Clock Monitor are disabled
67+
#pragma config FCKSM = CSECMD //Clock Switching Mode bits->Clock switching is enabled,Fail-safe Clock Monitor is disabled
6868
#pragma config PLLKEN = ON //PLL Lock Status Control->PLL lock signal will be used to disable PLL clock output if lock is lost
69-
#pragma config XTCFG = G3 //XT Config->24-32 MHz crystals
69+
#pragma config XTCFG = G1 //XT Config->8-16 MHz crystals
7070
#pragma config XTBST = ENABLE //XT Boost->Boost the kick-start
7171

7272
// FWDT

‎dspic33ck-can/boot.X/mcc_generated_files/traps.c‎

Lines changed: 0 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -136,18 +136,6 @@ void ERROR_HANDLER _SoftTrapError(void)
136136
TRAPS_halt_on_error(TRAPS_NVM_ERR);
137137
}
138138

139-
if(INTCON3bits.DMT)
140-
{
141-
INTCON3bits.DMT = 0; //Clear the trap flag
142-
TRAPS_halt_on_error(TRAPS_DMT_ERR);
143-
}
144-
145-
if(INTCON3bits.DAE)
146-
{
147-
INTCON3bits.DAE = 0; //Clear the trap flag
148-
TRAPS_halt_on_error(TRAPS_DAE_ERR);
149-
}
150-
151139
if(INTCON3bits.DOOVR)
152140
{
153141
INTCON3bits.DOOVR = 0; //Clear the trap flag

‎dspic33ck-can/boot.X/nbproject/configurations.xml‎

Lines changed: 4 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -102,11 +102,11 @@
102102
<targetPluginBoard></targetPluginBoard>
103103
<platformTool>noID</platformTool>
104104
<languageToolchain>XC16</languageToolchain>
105-
<languageToolchainVersion>1.70</languageToolchainVersion>
105+
<languageToolchainVersion>2.00</languageToolchainVersion>
106106
<platform>3</platform>
107107
</toolsSet>
108108
<packs>
109-
<pack name="dsPIC33CK-MP_DFP" vendor="Microchip" version="1.6.176"/>
109+
<pack name="dsPIC33CK-MP_DFP" vendor="Microchip" version="1.7.208"/>
110110
</packs>
111111
<ScriptingSettings>
112112
</ScriptingSettings>
@@ -136,6 +136,7 @@
136136
<makeCustomizationNormalizeHexFile>false</makeCustomizationNormalizeHexFile>
137137
</makeCustomizationType>
138138
<C30>
139+
<property key="cast-align" value="false"/>
139140
<property key="code-model" value="default"/>
140141
<property key="const-model" value="default"/>
141142
<property key="data-model" value="default"/>
@@ -249,6 +250,7 @@
249250
<property key="warn-section-align" value="false"/>
250251
</C30-LD>
251252
<C30Global>
253+
<property key="combine-sourcefiles" value="false"/>
252254
<property key="common-include-directories" value=""/>
253255
<property key="dual-boot-partition" value="0"/>
254256
<property key="fast-math" value="false"/>

‎dspic33ck-canfd-ta100/app.X/mcc_generated_files/system.c‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -58,15 +58,15 @@
5858
#pragma config BSLIM = 8191 //Boot Segment Flash Page Address Limit bits->8191
5959

6060
// FOSCSEL
61-
#pragma config FNOSC = PRIPLL //Oscillator Source Selection->Primary Oscillator with PLL module (XT + PLL, HS + PLL, EC + PLL)
61+
#pragma config FNOSC = FRC //Oscillator Source Selection->FRC
6262
#pragma config IESO = OFF //Two-speed Oscillator Start-up Enable bit->Start up with user-selected oscillator source
6363

6464
// FOSC
6565
#pragma config POSCMD = XT //Primary Oscillator Mode Select bits->XT Crystal Oscillator Mode
6666
#pragma config OSCIOFNC = ON //OSC2 Pin Function bit->OSC2 is general purpose digital I/O pin
6767
#pragma config FCKSM = CSECMD //Clock Switching Mode bits->Clock switching is enabled,Fail-safe Clock Monitor is disabled
6868
#pragma config PLLKEN = ON //PLL Lock Status Control->PLL lock signal will be used to disable PLL clock output if lock is lost
69-
#pragma config XTCFG = G3 //XT Config->24-32 MHz crystals
69+
#pragma config XTCFG = G1 //XT Config->8-16 MHz crystals
7070
#pragma config XTBST = ENABLE //XT Boost->Boost the kick-start
7171

7272
// FWDT

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