switch to on board crystal

Author: royabean

dspic33ck-can/app.X/mcc_generated_files/clock.c

@@ -62,8 +62,8 @@ void CLOCK_Initialize(void)
     APLLFBD1 = 0x96;
     // APOST1DIV 1:4; APOST2DIV 1:1; AVCODIV FVCO/4; 
     APLLDIV1 = 0x41;
-    // CANCLKEN enabled; CANCLKSEL AFVCO/4; CANCLKDIV Divide by 15; 
-    CANCLKCON = 0x8A0E;
+    // CANCLKEN enabled; CANCLKSEL FPLLO; CANCLKDIV Divide by 15; 
+    CANCLKCON = 0x820E;
     // ROEN disabled; ROSWEN disabled; ROSLP disabled; ROSEL FOSC; ROOUT disabled; ROSIDL disabled; 
     REFOCONL = 0x00;
     // RODIV 0; 
@@ -90,7 +90,10 @@ void CLOCK_Initialize(void)
     PMD8 = 0x00;
     // CF no clock failure; NOSC PRIPLL; CLKLOCK unlocked; OSWEN Switch is Complete; 
     __builtin_write_OSCCONH((uint8_t) (0x03));
-    __builtin_write_OSCCONL((uint8_t) (0x00));
+    __builtin_write_OSCCONL((uint8_t) (0x01));
+    // Wait for Clock switch to occur
+    while (OSCCONbits.OSWEN != 0);
+    while (OSCCONbits.LOCK != 1);
 }
 
 bool CLOCK_AuxPllLockStatusGet()

dspic33ck-can/app.X/mcc_generated_files/system.c

@@ -58,13 +58,13 @@
 #pragma config BSLIM = 8191    //Boot Segment Flash Page Address Limit bits->8191
 
 // FOSCSEL
-#pragma config FNOSC = PRIPLL    //Oscillator Source Selection->Primary Oscillator with PLL module (XT + PLL, HS + PLL, EC + PLL)
-#pragma config IESO = ON    //Two-speed Oscillator Start-up Enable bit->Start up device with FRC, then switch to user-selected oscillator source
+#pragma config FNOSC = FRC    //Oscillator Source Selection->FRC
+#pragma config IESO = OFF    //Two-speed Oscillator Start-up Enable bit->Start up with user-selected oscillator source
 
 // FOSC
 #pragma config POSCMD = XT    //Primary Oscillator Mode Select bits->XT Crystal Oscillator Mode
 #pragma config OSCIOFNC = ON    //OSC2 Pin Function bit->OSC2 is general purpose digital I/O pin
-#pragma config FCKSM = CSDCMD    //Clock Switching Mode bits->Both Clock switching and Fail-safe Clock Monitor are disabled
+#pragma config FCKSM = CSECMD    //Clock Switching Mode bits->Clock switching is enabled,Fail-safe Clock Monitor is disabled
 #pragma config PLLKEN = ON    //PLL Lock Status Control->PLL lock signal will be used to disable PLL clock output if lock is lost
 #pragma config XTCFG = G1    //XT Config->8-16 MHz crystals
 #pragma config XTBST = ENABLE    //XT Boost->Boost the kick-start

dspic33ck-can/boot.X/mcc_generated_files/clock.c

@@ -62,8 +62,8 @@ void CLOCK_Initialize(void)
     APLLFBD1 = 0x96;
     // APOST1DIV 1:4; APOST2DIV 1:1; AVCODIV FVCO/4; 
     APLLDIV1 = 0x41;
-    // CANCLKEN enabled; CANCLKSEL AFVCO/4; CANCLKDIV Divide by 15; 
-    CANCLKCON = 0x8A0E;
+    // CANCLKEN enabled; CANCLKSEL FPLLO; CANCLKDIV Divide by 15; 
+    CANCLKCON = 0x820E;
     // ROEN disabled; ROSWEN disabled; ROSLP disabled; ROSEL FOSC; ROOUT disabled; ROSIDL disabled; 
     REFOCONL = 0x00;
     // RODIV 0; 
@@ -90,7 +90,10 @@ void CLOCK_Initialize(void)
     PMD8 = 0x00;
     // CF no clock failure; NOSC PRIPLL; CLKLOCK unlocked; OSWEN Switch is Complete; 
     __builtin_write_OSCCONH((uint8_t) (0x03));
-    __builtin_write_OSCCONL((uint8_t) (0x00));
+    __builtin_write_OSCCONL((uint8_t) (0x01));
+    // Wait for Clock switch to occur
+    while (OSCCONbits.OSWEN != 0);
+    while (OSCCONbits.LOCK != 1);
 }
 
 bool CLOCK_AuxPllLockStatusGet()

dspic33ck-can/boot.X/mcc_generated_files/system.c

@@ -58,13 +58,13 @@
 #pragma config BSLIM = 8191    //Boot Segment Flash Page Address Limit bits->8191
 
 // FOSCSEL
-#pragma config FNOSC = PRIPLL    //Oscillator Source Selection->Primary Oscillator with PLL module (XT + PLL, HS + PLL, EC + PLL)
-#pragma config IESO = ON    //Two-speed Oscillator Start-up Enable bit->Start up device with FRC, then switch to user-selected oscillator source
+#pragma config FNOSC = FRC    //Oscillator Source Selection->FRC
+#pragma config IESO = OFF    //Two-speed Oscillator Start-up Enable bit->Start up with user-selected oscillator source
 
 // FOSC
 #pragma config POSCMD = XT    //Primary Oscillator Mode Select bits->XT Crystal Oscillator Mode
 #pragma config OSCIOFNC = ON    //OSC2 Pin Function bit->OSC2 is general purpose digital I/O pin
-#pragma config FCKSM = CSDCMD    //Clock Switching Mode bits->Both Clock switching and Fail-safe Clock Monitor are disabled
+#pragma config FCKSM = CSECMD    //Clock Switching Mode bits->Clock switching is enabled,Fail-safe Clock Monitor is disabled
 #pragma config PLLKEN = ON    //PLL Lock Status Control->PLL lock signal will be used to disable PLL clock output if lock is lost
 #pragma config XTCFG = G1    //XT Config->8-16 MHz crystals
 #pragma config XTBST = ENABLE    //XT Boost->Boost the kick-start