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Correcting clock configuration range
1 parent 05cd0ac commit e436c38

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6 files changed

+8
-8
lines changed
  • dspic33ck-canfd-ta100
  • dspic33ck-canfd
  • dspic33ck-can

6 files changed

+8
-8
lines changed

dspic33ck-can/app.X/mcc_generated_files/system.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -66,7 +66,7 @@
6666
#pragma config OSCIOFNC = ON //OSC2 Pin Function bit->OSC2 is general purpose digital I/O pin
6767
#pragma config FCKSM = CSDCMD //Clock Switching Mode bits->Both Clock switching and Fail-safe Clock Monitor are disabled
6868
#pragma config PLLKEN = ON //PLL Lock Status Control->PLL lock signal will be used to disable PLL clock output if lock is lost
69-
#pragma config XTCFG = G3 //XT Config->24-32 MHz crystals
69+
#pragma config XTCFG = G1 //XT Config->8-16 MHz crystals
7070
#pragma config XTBST = ENABLE //XT Boost->Boost the kick-start
7171

7272
// FWDT

dspic33ck-can/boot.X/mcc_generated_files/system.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -66,7 +66,7 @@
6666
#pragma config OSCIOFNC = ON //OSC2 Pin Function bit->OSC2 is general purpose digital I/O pin
6767
#pragma config FCKSM = CSDCMD //Clock Switching Mode bits->Both Clock switching and Fail-safe Clock Monitor are disabled
6868
#pragma config PLLKEN = ON //PLL Lock Status Control->PLL lock signal will be used to disable PLL clock output if lock is lost
69-
#pragma config XTCFG = G3 //XT Config->24-32 MHz crystals
69+
#pragma config XTCFG = G1 //XT Config->8-16 MHz crystals
7070
#pragma config XTBST = ENABLE //XT Boost->Boost the kick-start
7171

7272
// FWDT

dspic33ck-canfd-ta100/app.X/mcc_generated_files/system.c

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -58,15 +58,15 @@
5858
#pragma config BSLIM = 8191 //Boot Segment Flash Page Address Limit bits->8191
5959

6060
// FOSCSEL
61-
#pragma config FNOSC = PRIPLL //Oscillator Source Selection->Primary Oscillator with PLL module (XT + PLL, HS + PLL, EC + PLL)
61+
#pragma config FNOSC = FRC //Oscillator Source Selection->FRC
6262
#pragma config IESO = OFF //Two-speed Oscillator Start-up Enable bit->Start up with user-selected oscillator source
6363

6464
// FOSC
6565
#pragma config POSCMD = XT //Primary Oscillator Mode Select bits->XT Crystal Oscillator Mode
6666
#pragma config OSCIOFNC = ON //OSC2 Pin Function bit->OSC2 is general purpose digital I/O pin
6767
#pragma config FCKSM = CSECMD //Clock Switching Mode bits->Clock switching is enabled,Fail-safe Clock Monitor is disabled
6868
#pragma config PLLKEN = ON //PLL Lock Status Control->PLL lock signal will be used to disable PLL clock output if lock is lost
69-
#pragma config XTCFG = G3 //XT Config->24-32 MHz crystals
69+
#pragma config XTCFG = G1 //XT Config->8-16 MHz crystals
7070
#pragma config XTBST = ENABLE //XT Boost->Boost the kick-start
7171

7272
// FWDT

dspic33ck-canfd-ta100/boot.X/mcc_generated_files/system.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -66,7 +66,7 @@
6666
#pragma config OSCIOFNC = ON //OSC2 Pin Function bit->OSC2 is general purpose digital I/O pin
6767
#pragma config FCKSM = CSECMD //Clock Switching Mode bits->Clock switching is enabled,Fail-safe Clock Monitor is disabled
6868
#pragma config PLLKEN = ON //PLL Lock Status Control->PLL lock signal will be used to disable PLL clock output if lock is lost
69-
#pragma config XTCFG = G3 //XT Config->24-32 MHz crystals
69+
#pragma config XTCFG = G1 //XT Config->8-16 MHz crystals
7070
#pragma config XTBST = ENABLE //XT Boost->Boost the kick-start
7171

7272
// FWDT

dspic33ck-canfd/app.X/mcc_generated_files/system.c

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -58,15 +58,15 @@
5858
#pragma config BSLIM = 8191 //Boot Segment Flash Page Address Limit bits->8191
5959

6060
// FOSCSEL
61-
#pragma config FNOSC = PRIPLL //Oscillator Source Selection->Primary Oscillator with PLL module (XT + PLL, HS + PLL, EC + PLL)
61+
#pragma config FNOSC = FRC //Oscillator Source Selection->FRC
6262
#pragma config IESO = OFF //Two-speed Oscillator Start-up Enable bit->Start up with user-selected oscillator source
6363

6464
// FOSC
6565
#pragma config POSCMD = XT //Primary Oscillator Mode Select bits->XT Crystal Oscillator Mode
6666
#pragma config OSCIOFNC = ON //OSC2 Pin Function bit->OSC2 is general purpose digital I/O pin
6767
#pragma config FCKSM = CSECMD //Clock Switching Mode bits->Clock switching is enabled,Fail-safe Clock Monitor is disabled
6868
#pragma config PLLKEN = ON //PLL Lock Status Control->PLL lock signal will be used to disable PLL clock output if lock is lost
69-
#pragma config XTCFG = G3 //XT Config->24-32 MHz crystals
69+
#pragma config XTCFG = G1 //XT Config->8-16 MHz crystals
7070
#pragma config XTBST = ENABLE //XT Boost->Boost the kick-start
7171

7272
// FWDT

dspic33ck-canfd/boot.X/mcc_generated_files/system.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -66,7 +66,7 @@
6666
#pragma config OSCIOFNC = ON //OSC2 Pin Function bit->OSC2 is general purpose digital I/O pin
6767
#pragma config FCKSM = CSECMD //Clock Switching Mode bits->Clock switching is enabled,Fail-safe Clock Monitor is disabled
6868
#pragma config PLLKEN = ON //PLL Lock Status Control->PLL lock signal will be used to disable PLL clock output if lock is lost
69-
#pragma config XTCFG = G3 //XT Config->24-32 MHz crystals
69+
#pragma config XTCFG = G1 //XT Config->8-16 MHz crystals
7070
#pragma config XTBST = ENABLE //XT Boost->Boost the kick-start
7171

7272
// FWDT

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