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app.X/mcc_generated_files
boot.X/mcc_generated_files
app.X/mcc_generated_files
boot.X/mcc_generated_files
app.X/mcc_generated_files
boot.X/mcc_generated_files Expand file tree Collapse file tree 6 files changed +8
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lines changed Original file line number Diff line number Diff line change 6666#pragma config OSCIOFNC = ON //OSC2 Pin Function bit->OSC2 is general purpose digital I/O pin
6767#pragma config FCKSM = CSDCMD //Clock Switching Mode bits->Both Clock switching and Fail-safe Clock Monitor are disabled
6868#pragma config PLLKEN = ON //PLL Lock Status Control->PLL lock signal will be used to disable PLL clock output if lock is lost
69- #pragma config XTCFG = G3 //XT Config->24-32 MHz crystals
69+ #pragma config XTCFG = G1 //XT Config->8-16 MHz crystals
7070#pragma config XTBST = ENABLE //XT Boost->Boost the kick-start
7171
7272// FWDT
Original file line number Diff line number Diff line change 6666#pragma config OSCIOFNC = ON //OSC2 Pin Function bit->OSC2 is general purpose digital I/O pin
6767#pragma config FCKSM = CSDCMD //Clock Switching Mode bits->Both Clock switching and Fail-safe Clock Monitor are disabled
6868#pragma config PLLKEN = ON //PLL Lock Status Control->PLL lock signal will be used to disable PLL clock output if lock is lost
69- #pragma config XTCFG = G3 //XT Config->24-32 MHz crystals
69+ #pragma config XTCFG = G1 //XT Config->8-16 MHz crystals
7070#pragma config XTBST = ENABLE //XT Boost->Boost the kick-start
7171
7272// FWDT
Original file line number Diff line number Diff line change 5858#pragma config BSLIM = 8191 //Boot Segment Flash Page Address Limit bits->8191
5959
6060// FOSCSEL
61- #pragma config FNOSC = PRIPLL //Oscillator Source Selection->Primary Oscillator with PLL module (XT + PLL, HS + PLL, EC + PLL)
61+ #pragma config FNOSC = FRC //Oscillator Source Selection->FRC
6262#pragma config IESO = OFF //Two-speed Oscillator Start-up Enable bit->Start up with user-selected oscillator source
6363
6464// FOSC
6565#pragma config POSCMD = XT //Primary Oscillator Mode Select bits->XT Crystal Oscillator Mode
6666#pragma config OSCIOFNC = ON //OSC2 Pin Function bit->OSC2 is general purpose digital I/O pin
6767#pragma config FCKSM = CSECMD //Clock Switching Mode bits->Clock switching is enabled,Fail-safe Clock Monitor is disabled
6868#pragma config PLLKEN = ON //PLL Lock Status Control->PLL lock signal will be used to disable PLL clock output if lock is lost
69- #pragma config XTCFG = G3 //XT Config->24-32 MHz crystals
69+ #pragma config XTCFG = G1 //XT Config->8-16 MHz crystals
7070#pragma config XTBST = ENABLE //XT Boost->Boost the kick-start
7171
7272// FWDT
Original file line number Diff line number Diff line change 6666#pragma config OSCIOFNC = ON //OSC2 Pin Function bit->OSC2 is general purpose digital I/O pin
6767#pragma config FCKSM = CSECMD //Clock Switching Mode bits->Clock switching is enabled,Fail-safe Clock Monitor is disabled
6868#pragma config PLLKEN = ON //PLL Lock Status Control->PLL lock signal will be used to disable PLL clock output if lock is lost
69- #pragma config XTCFG = G3 //XT Config->24-32 MHz crystals
69+ #pragma config XTCFG = G1 //XT Config->8-16 MHz crystals
7070#pragma config XTBST = ENABLE //XT Boost->Boost the kick-start
7171
7272// FWDT
Original file line number Diff line number Diff line change 5858#pragma config BSLIM = 8191 //Boot Segment Flash Page Address Limit bits->8191
5959
6060// FOSCSEL
61- #pragma config FNOSC = PRIPLL //Oscillator Source Selection->Primary Oscillator with PLL module (XT + PLL, HS + PLL, EC + PLL)
61+ #pragma config FNOSC = FRC //Oscillator Source Selection->FRC
6262#pragma config IESO = OFF //Two-speed Oscillator Start-up Enable bit->Start up with user-selected oscillator source
6363
6464// FOSC
6565#pragma config POSCMD = XT //Primary Oscillator Mode Select bits->XT Crystal Oscillator Mode
6666#pragma config OSCIOFNC = ON //OSC2 Pin Function bit->OSC2 is general purpose digital I/O pin
6767#pragma config FCKSM = CSECMD //Clock Switching Mode bits->Clock switching is enabled,Fail-safe Clock Monitor is disabled
6868#pragma config PLLKEN = ON //PLL Lock Status Control->PLL lock signal will be used to disable PLL clock output if lock is lost
69- #pragma config XTCFG = G3 //XT Config->24-32 MHz crystals
69+ #pragma config XTCFG = G1 //XT Config->8-16 MHz crystals
7070#pragma config XTBST = ENABLE //XT Boost->Boost the kick-start
7171
7272// FWDT
Original file line number Diff line number Diff line change 6666#pragma config OSCIOFNC = ON //OSC2 Pin Function bit->OSC2 is general purpose digital I/O pin
6767#pragma config FCKSM = CSECMD //Clock Switching Mode bits->Clock switching is enabled,Fail-safe Clock Monitor is disabled
6868#pragma config PLLKEN = ON //PLL Lock Status Control->PLL lock signal will be used to disable PLL clock output if lock is lost
69- #pragma config XTCFG = G3 //XT Config->24-32 MHz crystals
69+ #pragma config XTCFG = G1 //XT Config->8-16 MHz crystals
7070#pragma config XTBST = ENABLE //XT Boost->Boost the kick-start
7171
7272// FWDT
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