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| 1 | +// SPDX-License-Identifier: GPL-2.0-only |
| 2 | +// Definitions for IMX500 camera module on VC I2C bus |
| 3 | +/dts-v1/; |
| 4 | +/plugin/; |
| 5 | + |
| 6 | +#include <dt-bindings/gpio/gpio.h> |
| 7 | + |
| 8 | +/{ |
| 9 | + compatible = "brcm,bcm2712"; |
| 10 | + |
| 11 | + fragment@0 { |
| 12 | + target = <&i2c0if>; |
| 13 | + __overlay__ { |
| 14 | + status = "okay"; |
| 15 | + }; |
| 16 | + }; |
| 17 | + |
| 18 | + fragment@1 { |
| 19 | + target = <&i2c0mux>; |
| 20 | + __overlay__ { |
| 21 | + status = "okay"; |
| 22 | + }; |
| 23 | + }; |
| 24 | + |
| 25 | + reg_frag: fragment@2 { |
| 26 | + target = <&cam1_reg>; |
| 27 | + cam_reg: __overlay__ { |
| 28 | + startup-delay-us = <300000>; |
| 29 | + }; |
| 30 | + }; |
| 31 | + |
| 32 | + i2c_frag: fragment@100 { |
| 33 | + target = <&i2c_csi_dsi>; |
| 34 | + __overlay__ { |
| 35 | + #address-cells = <1>; |
| 36 | + #size-cells = <0>; |
| 37 | + status = "okay"; |
| 38 | + |
| 39 | + #include "imx500.dtsi" |
| 40 | + #include "rpi-rp2040-gpio-bridge.dtsi" |
| 41 | + }; |
| 42 | + }; |
| 43 | + |
| 44 | + csi_frag: fragment@101 { |
| 45 | + target = <&csi1>; |
| 46 | + csi: __overlay__ { |
| 47 | + status = "okay"; |
| 48 | + brcm,media-controller; |
| 49 | + |
| 50 | + port { |
| 51 | + csi_ep: endpoint { |
| 52 | + remote-endpoint = <&cam_endpoint>; |
| 53 | + clock-lanes = <0>; |
| 54 | + data-lanes = <1 2>; |
| 55 | + clock-noncontinuous; |
| 56 | + }; |
| 57 | + }; |
| 58 | + }; |
| 59 | + }; |
| 60 | + |
| 61 | + spi_frag: fragment@102 { |
| 62 | + target = <&spi_bridge>; |
| 63 | + spi_frag_overlay: __overlay__ { |
| 64 | + fast_xfer_requires_i2c_lock = <1>; |
| 65 | + fast_xfer_recv_gpio_base = <11>; |
| 66 | + fast_xfer-gpios = <&rp1_gpio 40 0>, // CD1_SDA (used as data) |
| 67 | + <&rp1_gpio 48 0>; // CD1_IO1_MICDAT1 (clock) |
| 68 | + }; |
| 69 | + }; |
| 70 | + |
| 71 | + spi_bridge_frag: fragment@103 { |
| 72 | + target = <&spi_bridgedev0>; |
| 73 | + __overlay__ { |
| 74 | + compatible = "sony,imx500"; |
| 75 | + }; |
| 76 | + }; |
| 77 | + |
| 78 | + clocks_frag: fragment@104 { |
| 79 | + target-path = "/clocks"; |
| 80 | + __overlay__ { |
| 81 | + clk_aicam: clk-aicam { |
| 82 | + compatible = "fixed-clock"; |
| 83 | + #clock-cells = <0>; |
| 84 | + clock-frequency = <24000000>; |
| 85 | + }; |
| 86 | + |
| 87 | + clk_aicam_gated: clk-aicam-gated { |
| 88 | + compatible = "gpio-gate-clock"; |
| 89 | + clocks = <&clk_aicam>; |
| 90 | + #clock-cells = <0>; |
| 91 | + enable-gpios = <&spi_bridge 21 GPIO_ACTIVE_HIGH>; |
| 92 | + }; |
| 93 | + }; |
| 94 | + }; |
| 95 | + |
| 96 | + __overrides__ { |
| 97 | + rotation = <&cam_node>,"rotation:0"; |
| 98 | + orientation = <&cam_node>,"orientation:0"; |
| 99 | + media-controller = <&csi>,"brcm,media-controller?"; |
| 100 | + cam0 = <&i2c_frag>, "target:0=",<&i2c_csi_dsi0>, |
| 101 | + <&csi_frag>, "target:0=",<&csi0>, |
| 102 | + <&spi_frag_overlay>, "fast_xfer-gpios:4=38", // CD0_SDA (data) |
| 103 | + <&spi_frag_overlay>, "fast_xfer-gpios:16=35", // CD0_IO1_MICDAT0 (clock) |
| 104 | + <&spi_bridge>, "power-supply:0=",<&cam0_reg>, |
| 105 | + <®_frag>, "target:0=",<&cam0_reg>, |
| 106 | + <&cam_node>, "VANA-supply:0=",<&cam0_reg>; |
| 107 | + bypass-cache = <&spi_bridge>,"bypass-cache?"; |
| 108 | + }; |
| 109 | +}; |
| 110 | + |
| 111 | +&cam_node { |
| 112 | + status = "okay"; |
| 113 | + reset-gpios = <&spi_bridge 20 GPIO_ACTIVE_HIGH>; |
| 114 | + clocks = <&clk_aicam_gated>; |
| 115 | + spi = <&spi_bridgedev0>; |
| 116 | +}; |
| 117 | + |
| 118 | +&spi_bridge { |
| 119 | + status = "okay"; |
| 120 | +}; |
| 121 | + |
| 122 | +&cam_endpoint { |
| 123 | + remote-endpoint = <&csi_ep>; |
| 124 | +}; |
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