diff --git a/compiler/rustc_target/src/spec/mod.rs b/compiler/rustc_target/src/spec/mod.rs index 3d500694c978b..ed2f7d43627eb 100644 --- a/compiler/rustc_target/src/spec/mod.rs +++ b/compiler/rustc_target/src/spec/mod.rs @@ -1741,10 +1741,14 @@ supported_targets! { ("mipsel-unknown-none", mipsel_unknown_none), ("mips-mti-none-elf", mips_mti_none_elf), ("mipsel-mti-none-elf", mipsel_mti_none_elf), - ("thumbv4t-none-eabi", thumbv4t_none_eabi), + ("armv4t-none-eabi", armv4t_none_eabi), - ("thumbv5te-none-eabi", thumbv5te_none_eabi), ("armv5te-none-eabi", armv5te_none_eabi), + ("armv6-none-eabi", armv6_none_eabi), + ("armv6-none-eabihf", armv6_none_eabihf), + ("thumbv4t-none-eabi", thumbv4t_none_eabi), + ("thumbv5te-none-eabi", thumbv5te_none_eabi), + ("thumbv6-none-eabi", thumbv6_none_eabi), ("aarch64_be-unknown-linux-gnu", aarch64_be_unknown_linux_gnu), ("aarch64-unknown-linux-gnu_ilp32", aarch64_unknown_linux_gnu_ilp32), diff --git a/compiler/rustc_target/src/spec/targets/armv4t_none_eabi.rs b/compiler/rustc_target/src/spec/targets/armv4t_none_eabi.rs index fc66a2fa8f9ef..c917531932f62 100644 --- a/compiler/rustc_target/src/spec/targets/armv4t_none_eabi.rs +++ b/compiler/rustc_target/src/spec/targets/armv4t_none_eabi.rs @@ -1,4 +1,4 @@ -//! Targets the ARMv4T, with code as `a32` code by default. +//! Targets the ARMv4T architecture, with `a32` code by default. //! //! Primarily of use for the GBA, but usable with other devices too. //! diff --git a/compiler/rustc_target/src/spec/targets/armv5te_none_eabi.rs b/compiler/rustc_target/src/spec/targets/armv5te_none_eabi.rs index 8089e9a7a0640..b8ae881f3dae7 100644 --- a/compiler/rustc_target/src/spec/targets/armv5te_none_eabi.rs +++ b/compiler/rustc_target/src/spec/targets/armv5te_none_eabi.rs @@ -1,4 +1,4 @@ -//! Targets the ARMv5TE, with code as `a32` code by default. +//! Targets the ARMv5TE architecture, with `a32` code by default. use crate::spec::{Abi, Arch, FloatAbi, Target, TargetMetadata, TargetOptions, base, cvs}; diff --git a/compiler/rustc_target/src/spec/targets/armv6_none_eabi.rs b/compiler/rustc_target/src/spec/targets/armv6_none_eabi.rs new file mode 100644 index 0000000000000..a8dd9374b5134 --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/armv6_none_eabi.rs @@ -0,0 +1,27 @@ +//! Targets the ARMv6K architecture, with `a32` code by default. + +use crate::spec::{Abi, Arch, FloatAbi, Target, TargetMetadata, TargetOptions, base, cvs}; + +pub(crate) fn target() -> Target { + Target { + llvm_target: "armv6-none-eabi".into(), + metadata: TargetMetadata { + description: Some("Bare ARMv6 soft-float".into()), + tier: Some(3), + host_tools: Some(false), + std: Some(false), + }, + pointer_width: 32, + arch: Arch::Arm, + data_layout: "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64".into(), + options: TargetOptions { + abi: Abi::Eabi, + llvm_floatabi: Some(FloatAbi::Soft), + asm_args: cvs!["-mthumb-interwork", "-march=armv6", "-mlittle-endian",], + features: "+soft-float,+strict-align,+v6k".into(), + atomic_cas: true, + has_thumb_interworking: true, + ..base::arm_none::opts() + }, + } +} diff --git a/compiler/rustc_target/src/spec/targets/armv6_none_eabihf.rs b/compiler/rustc_target/src/spec/targets/armv6_none_eabihf.rs new file mode 100644 index 0000000000000..ea5bbe7eede41 --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/armv6_none_eabihf.rs @@ -0,0 +1,27 @@ +//! Targets the ARMv6K architecture, with `a32` code by default, and hard-float ABI + +use crate::spec::{Abi, Arch, FloatAbi, Target, TargetMetadata, TargetOptions, base, cvs}; + +pub(crate) fn target() -> Target { + Target { + llvm_target: "armv6-none-eabihf".into(), + metadata: TargetMetadata { + description: Some("Bare ARMv6 hard-float".into()), + tier: Some(3), + host_tools: Some(false), + std: Some(false), + }, + pointer_width: 32, + arch: Arch::Arm, + data_layout: "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64".into(), + options: TargetOptions { + abi: Abi::EabiHf, + llvm_floatabi: Some(FloatAbi::Hard), + asm_args: cvs!["-mthumb-interwork", "-march=armv6", "-mlittle-endian",], + features: "+strict-align,+v6k,+vfp2,-d32".into(), + atomic_cas: true, + has_thumb_interworking: true, + ..base::arm_none::opts() + }, + } +} diff --git a/compiler/rustc_target/src/spec/targets/thumbv4t_none_eabi.rs b/compiler/rustc_target/src/spec/targets/thumbv4t_none_eabi.rs index 50eccbed3ac10..dfb8ccb06bc2c 100644 --- a/compiler/rustc_target/src/spec/targets/thumbv4t_none_eabi.rs +++ b/compiler/rustc_target/src/spec/targets/thumbv4t_none_eabi.rs @@ -1,4 +1,4 @@ -//! Targets the ARMv4T, with code as `t32` code by default. +//! Targets the ARMv4T architecture, with `t32` code by default. //! //! Primarily of use for the GBA, but usable with other devices too. //! diff --git a/compiler/rustc_target/src/spec/targets/thumbv5te_none_eabi.rs b/compiler/rustc_target/src/spec/targets/thumbv5te_none_eabi.rs index 6acb03e3b296b..3b41208b69f4c 100644 --- a/compiler/rustc_target/src/spec/targets/thumbv5te_none_eabi.rs +++ b/compiler/rustc_target/src/spec/targets/thumbv5te_none_eabi.rs @@ -1,4 +1,4 @@ -//! Targets the ARMv5TE, with code as `t32` code by default. +//! Targets the ARMv5TE architecture, with `t32` code by default. use crate::spec::{Abi, Arch, FloatAbi, Target, TargetMetadata, TargetOptions, base, cvs}; diff --git a/compiler/rustc_target/src/spec/targets/thumbv6_none_eabi.rs b/compiler/rustc_target/src/spec/targets/thumbv6_none_eabi.rs new file mode 100644 index 0000000000000..ac2e256658608 --- /dev/null +++ b/compiler/rustc_target/src/spec/targets/thumbv6_none_eabi.rs @@ -0,0 +1,29 @@ +//! Targets the ARMv6K architecture, with `t32` code by default. + +use crate::spec::{Abi, Arch, FloatAbi, Target, TargetMetadata, TargetOptions, base, cvs}; + +pub(crate) fn target() -> Target { + Target { + llvm_target: "thumbv6-none-eabi".into(), + metadata: TargetMetadata { + description: Some("Thumb-mode Bare ARMv6 soft-float".into()), + tier: Some(3), + host_tools: Some(false), + std: Some(false), + }, + pointer_width: 32, + arch: Arch::Arm, + data_layout: "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64".into(), + options: TargetOptions { + abi: Abi::Eabi, + llvm_floatabi: Some(FloatAbi::Soft), + asm_args: cvs!["-mthumb-interwork", "-march=armv6", "-mlittle-endian",], + features: "+soft-float,+strict-align,+v6k".into(), + // atomics not available until ARMv6T2 + atomic_cas: false, + max_atomic_width: Some(0), + has_thumb_interworking: true, + ..base::arm_none::opts() + }, + } +} diff --git a/library/core/src/hint.rs b/library/core/src/hint.rs index 4c050b49bf7eb..b7f78288b2b62 100644 --- a/library/core/src/hint.rs +++ b/library/core/src/hint.rs @@ -292,9 +292,18 @@ pub fn spin_loop() { // SAFETY: the `cfg` attr ensures that we only execute this on aarch64 targets. unsafe { crate::arch::aarch64::__isb(crate::arch::aarch64::SY) } } - all(target_arch = "arm", target_feature = "v6") => { - // SAFETY: the `cfg` attr ensures that we only execute this on arm targets - // with support for the v6 feature. + all( + target_arch = "arm", + any( + all(target_feature = "v6k", not(target_feature = "thumb-mode")), + target_feature = "v6t2", + all(target_feature = "v6", target_feature = "mclass"), + ) + ) => { + // SAFETY: the `cfg` attr ensures that we only execute this on arm + // targets with support for the this feature. On ARMv6 in Thumb + // mode, T2 is required (see Arm DDI0406C Section A8.8.427), + // otherwise ARMv6-M or ARMv6K is enough unsafe { crate::arch::arm::__yield() } } target_arch = "loongarch32" => crate::arch::loongarch32::ibar::<0>(), diff --git a/library/stdarch/crates/core_arch/src/arm_shared/hints.rs b/library/stdarch/crates/core_arch/src/arm_shared/hints.rs index 54fd78270abda..8a25cc1163ccb 100644 --- a/library/stdarch/crates/core_arch/src/arm_shared/hints.rs +++ b/library/stdarch/crates/core_arch/src/arm_shared/hints.rs @@ -83,8 +83,11 @@ pub unsafe fn __sevl() { /// improve overall system performance. // Section 10.1 of ACLE says that the supported arches are: 8, 6K, 6-M // LLVM says "instruction requires: armv6k" +// On ARMv6 in Thumb mode, T2 is required (see Arm DDI0406C Section A8.8.427) #[cfg(any( - target_feature = "v6", + all(target_feature = "v6k", not(target_feature = "thumb-mode")), + target_feature = "v6t2", + all(target_feature = "v6", target_feature = "mclass"), target_arch = "aarch64", target_arch = "arm64ec", doc diff --git a/src/bootstrap/src/core/sanity.rs b/src/bootstrap/src/core/sanity.rs index d1f706fd9c3e8..a769411767f3a 100644 --- a/src/bootstrap/src/core/sanity.rs +++ b/src/bootstrap/src/core/sanity.rs @@ -43,6 +43,9 @@ const STAGE0_MISSING_TARGETS: &[&str] = &[ "riscv64gc-unknown-redox", "riscv64im-unknown-none-elf", "hexagon-unknown-qurt", + "armv6-none-eabi", + "armv6-none-eabihf", + "thumbv6-none-eabi", ]; /// Minimum version threshold for libstdc++ required when using prebuilt LLVM diff --git a/src/doc/rustc/src/SUMMARY.md b/src/doc/rustc/src/SUMMARY.md index 3b8852f8ff9f7..8db0aa5dd7eaa 100644 --- a/src/doc/rustc/src/SUMMARY.md +++ b/src/doc/rustc/src/SUMMARY.md @@ -56,6 +56,7 @@ - [arm-none-eabi](platform-support/arm-none-eabi.md) - [{arm,thumb}v4t-none-eabi](platform-support/armv4t-none-eabi.md) - [{arm,thumb}v5te-none-eabi](platform-support/armv5te-none-eabi.md) + - [{arm,thumb}v6-none-eabi{,hf}](platform-support/armv6-none-eabi.md) - [armv7a-none-eabi{,hf}](platform-support/armv7a-none-eabi.md) - [armv7r-none-eabi{,hf}](platform-support/armv7r-none-eabi.md) - [armebv7r-none-eabi{,hf}](platform-support/armebv7r-none-eabi.md) diff --git a/src/doc/rustc/src/platform-support.md b/src/doc/rustc/src/platform-support.md index 5164ab69d3531..03d8af2990bc2 100644 --- a/src/doc/rustc/src/platform-support.md +++ b/src/doc/rustc/src/platform-support.md @@ -285,12 +285,14 @@ target | std | host | notes [`arm64e-apple-ios`](platform-support/arm64e-apple-ios.md) | ✓ | | ARM64e Apple iOS [`arm64e-apple-tvos`](platform-support/arm64e-apple-tvos.md) | ✓ | | ARM64e Apple tvOS [`armeb-unknown-linux-gnueabi`](platform-support/armeb-unknown-linux-gnueabi.md) | ✓ | ? | Arm BE8 the default Arm big-endian architecture since [Armv6](https://developer.arm.com/documentation/101754/0616/armlink-Reference/armlink-Command-line-Options/--be8?lang=en). -[`armebv7r-none-eabi`](platform-support/armebv7r-none-eabi.md) | * | Bare Armv7-R, Big Endian -[`armebv7r-none-eabihf`](platform-support/armebv7r-none-eabi.md) | * | Bare Armv7-R, Big Endian, hardfloat +[`armebv7r-none-eabi`](platform-support/armebv7r-none-eabi.md) | * | | Bare Armv7-R, Big Endian +[`armebv7r-none-eabihf`](platform-support/armebv7r-none-eabi.md) | * | | Bare Armv7-R, Big Endian, hardfloat [`armv4t-none-eabi`](platform-support/armv4t-none-eabi.md) | * | | Bare Armv4T `armv4t-unknown-linux-gnueabi` | ? | | Armv4T Linux [`armv5te-none-eabi`](platform-support/armv5te-none-eabi.md) | * | | Bare Armv5TE `armv5te-unknown-linux-uclibceabi` | ? | | Armv5TE Linux with uClibc +[`armv6-none-eabi`](platform-support/armv6-none-eabi.md) | * | | Bare Armv6 +[`armv6-none-eabihf`](platform-support/armv6-none-eabi.md) | * | | Bare Armv6, hardfloat [`armv6-unknown-freebsd`](platform-support/freebsd.md) | ✓ | ✓ | Armv6 FreeBSD [`armv6-unknown-netbsd-eabihf`](platform-support/netbsd.md) | ✓ | ✓ | Armv6 NetBSD w/hard-float [`armv6k-nintendo-3ds`](platform-support/armv6k-nintendo-3ds.md) | ? | | Armv6k Nintendo 3DS, Horizon (Requires devkitARM toolchain) @@ -409,6 +411,7 @@ target | std | host | notes [`sparc64-unknown-openbsd`](platform-support/openbsd.md) | ✓ | ✓ | OpenBSD/sparc64 [`thumbv4t-none-eabi`](platform-support/armv4t-none-eabi.md) | * | | Thumb-mode Bare Armv4T [`thumbv5te-none-eabi`](platform-support/armv5te-none-eabi.md) | * | | Thumb-mode Bare Armv5TE +[`thumbv6-none-eabi`](platform-support/armv6-none-eabi.md) | * | | Thumb-mode Bare Armv6 [`thumbv6m-nuttx-eabi`](platform-support/nuttx.md) | ✓ | | ARMv6M with NuttX `thumbv7a-pc-windows-msvc` | | | [`thumbv7a-uwp-windows-msvc`](platform-support/uwp-windows-msvc.md) | | | diff --git a/src/doc/rustc/src/platform-support/arm-none-eabi.md b/src/doc/rustc/src/platform-support/arm-none-eabi.md index 81545db6c51f1..cf1fe9ed59ed6 100644 --- a/src/doc/rustc/src/platform-support/arm-none-eabi.md +++ b/src/doc/rustc/src/platform-support/arm-none-eabi.md @@ -37,6 +37,7 @@ their own document. - *Legacy* Arm Architectures - [`armv4t-none-eabi` and `thumbv4t-none-eabi`](armv4t-none-eabi.md) - [`armv5te-none-eabi` and `thumbv5te-none-eabi`](armv5te-none-eabi.md) + - [`armv6-none-eabi`, `armv6-none-eabihf`, `thumbv6-none-eabi`](armv6-none-eabi.md) ## Instruction Sets diff --git a/src/doc/rustc/src/platform-support/armv6-none-eabi.md b/src/doc/rustc/src/platform-support/armv6-none-eabi.md new file mode 100644 index 0000000000000..5dc832c18cefa --- /dev/null +++ b/src/doc/rustc/src/platform-support/armv6-none-eabi.md @@ -0,0 +1,37 @@ +# `armv6-none-eabi*` and `thumbv6-none-eabi` + +* **Tier: 3** +* **Library Support:** core and alloc (bare-metal, `#![no_std]`) + +Bare-metal target for any cpu in the Armv6 architecture family, supporting +ARM/Thumb code interworking (aka `Arm`/`Thumb`), with `Arm` code as the default +code generation. The most common processor family using the Armv6 architecture +is the ARM11, which includes the ARM1176JZF-S used in the original Raspberry Pi +and in the Raspberry Pi Zero. + +This target assumes your processor has the Armv6K extensions, as basically all +Armv6 processors do[^1]. The Armv6K extension adds the `LDREXB` and `STREXB` +instructions required to implement CAS on the [`AtomicU8`] and [`AtomicI8`] types. + +The `thumbv6-none-eabi` target is the same as this one, but the instruction set +defaults to `Thumb`. Note that this target only supports the old Thumb-1 +instruction set, not the later Thumb-2 instruction set that was added in the +Armv6T2 extension. + +The `armv6-none-eabihf` target uses the EABIHF hard-float ABI, and requires an +FPU - it assumes a VFP2D16 FPU is present. The FPU is not available from Thumb +mode so there is no `thumbv6-none-eabihf` target. + +See [`arm-none-eabi`](arm-none-eabi.md) for information applicable to all +`arm-none-eabi` targets. + +[`AtomicU8`]: https://docs.rust-lang.org/stable/core/sync/atomic/struct.AtomicU8.html +[`AtomicI8`]: https://docs.rust-lang.org/stable/core/sync/atomic/struct.AtomicI8.html + +## Target Maintainers + +[@thejpster](https://github.com/thejpster) + +[^1]: The only ARMv6 processor without the Armv6k extensions is the first (r0) +revision of the ARM1136 - in the unlikely event you have a chip with one of +these processors, use the ARMv5TE target instead. diff --git a/tests/assembly-llvm/targets/targets-elf.rs b/tests/assembly-llvm/targets/targets-elf.rs index c8b81cc858d6a..77e3e4519e674 100644 --- a/tests/assembly-llvm/targets/targets-elf.rs +++ b/tests/assembly-llvm/targets/targets-elf.rs @@ -139,6 +139,12 @@ //@ revisions: armv5te_unknown_linux_uclibceabi //@ [armv5te_unknown_linux_uclibceabi] compile-flags: --target armv5te-unknown-linux-uclibceabi //@ [armv5te_unknown_linux_uclibceabi] needs-llvm-components: arm +//@ revisions: armv6_none_eabi +//@ [armv6_none_eabi] compile-flags: --target armv6-none-eabi +//@ [armv6_none_eabi] needs-llvm-components: arm +//@ revisions: armv6_none_eabihf +//@ [armv6_none_eabihf] compile-flags: --target armv6-none-eabihf +//@ [armv6_none_eabihf] needs-llvm-components: arm //@ revisions: armv6_unknown_freebsd //@ [armv6_unknown_freebsd] compile-flags: --target armv6-unknown-freebsd //@ [armv6_unknown_freebsd] needs-llvm-components: arm @@ -559,6 +565,9 @@ //@ revisions: thumbv5te_none_eabi //@ [thumbv5te_none_eabi] compile-flags: --target thumbv5te-none-eabi //@ [thumbv5te_none_eabi] needs-llvm-components: arm +//@ revisions: thumbv6_none_eabi +//@ [thumbv6_none_eabi] compile-flags: --target thumbv6-none-eabi +//@ [thumbv6_none_eabi] needs-llvm-components: arm //@ revisions: thumbv6m_none_eabi //@ [thumbv6m_none_eabi] compile-flags: --target thumbv6m-none-eabi //@ [thumbv6m_none_eabi] needs-llvm-components: arm