3.6: minor fixes for typos and exercises (freechipsproject#160)

Co-authored-by: edwardcwang <edwardcwang@users.noreply.github.com>

Author: wunderabt

3.6_types.ipynb

@@ -165,7 +165,7 @@
     "\n",
     "If you make a mistake and mix up `UInt` and `Int` or `Bool` and `Boolean`, the Scala compiler will generally catch it for you.\n",
     "This is because of Scala's static typing.\n",
-    "At compile time, the compiler is able to distinguish between Chisel and Scala types and understand that `if ()` expects a `Boolean` and `when ()` expects a `Bool`.\n"
+    "At compile time, the compiler is able to distinguish between Chisel and Scala types and also able to understand that `if ()` expects a `Boolean` and `when ()` expects a `Bool`.\n"
    ]
   },
   {
@@ -288,7 +288,7 @@
    "metadata": {},
    "source": [
     "It is good to remember that Chisel types generally should not be value matched.\n",
-    "Scala's match executes during circuit elaboration, but what you probably want is an post-elaboration comparison.\n",
+    "Scala's match executes during circuit elaboration, but what you probably want is a post-elaboration comparison.\n",
     "The following gives a syntax error:"
    ]
   },
@@ -367,8 +367,8 @@
    "cell_type": "markdown",
    "metadata": {},
    "source": [
-    "If you look at the `delay` function, you should note that addition to matching on the type of each character, we are also:\n",
-    "- Directly reference internal values of the parameters\n",
+    "If you look at the `delay` function, you should note that in addition to matching on the type of each character, we are also:\n",
+    "- Directly referencing internal values of the parameters\n",
     "- Sometimes, are matching directly on the internal values of the parameters\n",
     "\n",
     "These are possible due to the compiler implementing an `unapply` method. Note that unapplying the case is just syntactic sugar; e.g. the following two cases examples are equivalent:\n",
@@ -429,7 +429,7 @@
     "\n",
     "Partial functions can be chained together with `orElse`.\n",
     "\n",
-    "Note that calling a `PartialFunction` with a undefined input will result in a runtime error. This can happen, for example, if the input to the `PartialFunction` is user-defined. To be more type-safe, we recommend writing functions that return an `Option` instead."
+    "Note that calling a `PartialFunction` with an undefined input will result in a runtime error. This can happen, for example, if the input to the `PartialFunction` is user-defined. To be more type-safe, we recommend writing functions that return an `Option` instead."
    ]
   },
   {
@@ -542,7 +542,7 @@
     "\n",
     "This section will just get your toes wet; to understand more, check out [this tutorial](https://twitter.github.io/scala_school/type-basics.html).\n",
     "\n",
-    "Classes can be polymorphic in their types. One good example are sequences, which require knowing what the type of the elements it contains."
+    "Classes can be polymorphic in their types. One good example is sequences, which require knowing their contained type."
    ]
   },
   {
@@ -621,7 +621,7 @@
     "\n",
     "`chisel3.Data` is the base class for Chisel hardware types.\n",
     "`UInt`, `SInt`, `Vec`, `Bundle`, etc. are all instances of `Data`.\n",
-    "`Data` can be used in IOs and support `:=`, wires, regs, etc.\n",
+    "`Data` can be used in IOs and supports `:=`, wires, regs, etc.\n",
     "\n",
     "Registers are a good example of polymorphic code in Chisel.\n",
     "Look at the implementation of `RegEnable` (a register with a `Bool` enable signal) [here](https://github.com/freechipsproject/chisel3/blob/v3.0.0/src/main/scala/chisel3/util/Reg.scala#L10).\n",
@@ -644,7 +644,7 @@
     "These operations cannot be done on arbitrary objects; for example wire := 3 is illegal because 3 is a Scala Int, not a Chisel UInt.\n",
     "If we use a type constraint to say that type T is a subclass of Data, then we can use := on any objects of type T because := is defined for all Data.\n",
     "\n",
-    "Here is an implementations of a shift register that take types as a parameter.\n",
+    "Here is an implementation of a shift register that take types as a parameter.\n",
     "*gen* is an argument of type T that tells what width to use, for example new ShiftRegister(UInt(4.W)) is a shift register for 4-bit UInts.\n",
     "*gen* also allows the Scala compiler to infer the type T- you can write new ShiftRegister[UInt](UInt(4.W)) if you want to to be more specific, but the Scala compiler is smart enough to figure it out if you leave out the [UInt]."
    ]
@@ -760,6 +760,7 @@
    "source": [
     "object Mac {\n",
     "    def apply[T <: Data : Ring](a: T, b: T, c: T): T = {\n",
+    "        ??? // your code\n",
     "    }\n",
     "}\n",
     "\n",
@@ -819,9 +820,7 @@
     "        val out = Output(genReg)\n",
     "    })\n",
     "    \n",
-    "    val reg = RegInit(genReg, Ring[T].zero) // init to zero\n",
-    "    reg := reg + io.in\n",
-    "    io.out := reg\n",
+    "    ??? // your code\n",
     "}\n",
     "\n",
     "test(new Integrator(SInt(4.W), SInt(8.W))) { c =>\n",