drivers: clock_control_mcux_syscon: add HSCMP clock support

add HSCMP clock support.

Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>

Author: ZhaoxiangJin

drivers/clock_control/clock_control_mcux_syscon.c

@@ -176,6 +176,24 @@ static int mcux_lpc_syscon_clock_control_on(const struct device *dev,
 	}
 #endif
 
+#if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(hscmp0))
+	if ((uint32_t)sub_system == MCUX_HSCMP0_CLK) {
+		CLOCK_EnableClock(kCLOCK_Hscmp0);
+	}
+#endif
+
+#if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(hscmp1))
+	if ((uint32_t)sub_system == MCUX_HSCMP1_CLK) {
+		CLOCK_EnableClock(kCLOCK_Hscmp1);
+	}
+#endif
+
+#if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(hscmp2))
+	if ((uint32_t)sub_system == MCUX_HSCMP2_CLK) {
+		CLOCK_EnableClock(kCLOCK_Hscmp2);
+	}
+#endif
+
 #ifdef CONFIG_SOC_FAMILY_MCXN
 #if DT_NODE_HAS_STATUS(DT_NODELABEL(trng), okay)
 	if ((uint32_t)sub_system == MCUX_ELS_CLK) {

include/zephyr/dt-bindings/clock/mcux_lpc_syscon_clock.h

@@ -140,4 +140,8 @@
 
 #define MCUX_MICFIL_CLK MCUX_LPC_CLK_ID(0x20, 0x00)
 
+#define MCUX_HSCMP0_CLK MCUX_LPC_CLK_ID(0x21, 0x00)
+#define MCUX_HSCMP1_CLK MCUX_LPC_CLK_ID(0x21, 0x01)
+#define MCUX_HSCMP2_CLK MCUX_LPC_CLK_ID(0x21, 0x02)
+
 #endif /* ZEPHYR_INCLUDE_DT_BINDINGS_CLOCK_MCUX_LPC_SYSCON_H_ */