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pre-commit: test PR84016 #289

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819592c
pre-commit: test PR84016
dtcxzyw Mar 5, 2024
1468f7f
pre-commit: Update
github-actions[bot] Mar 5, 2024
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620 changes: 269 additions & 351 deletions bench/diesel-rs/optimized/1d6yrclfdvavot4r.ll
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620 changes: 269 additions & 351 deletions bench/diesel-rs/optimized/1d8pgoqwu3bzfya4.ll
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92 changes: 32 additions & 60 deletions bench/diesel-rs/optimized/1hskzwx2vflsavf7.ll
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Original file line number Diff line number Diff line change
Expand Up @@ -130,34 +130,20 @@ _ZN9hashbrown3raw5inner11TableLayout20calculate_layout_for17h0f2d8eece5dfc4acE.l
%4 = getelementptr inbounds i8, ptr %0, i64 8
%5 = load i64, ptr %4, align 8, !noundef !4
%6 = add i64 %5, 1
%7 = tail call { i64, i1 } @llvm.umul.with.overflow.i64(i64 %2, i64 %6)
%8 = extractvalue { i64, i1 } %7, 1
%9 = xor i1 %8, true
tail call void @llvm.assume(i1 %9)
%10 = extractvalue { i64, i1 } %7, 0
%11 = add i64 %3, -1
%12 = tail call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %10, i64 %11)
%13 = extractvalue { i64, i1 } %12, 1
%14 = xor i1 %13, true
tail call void @llvm.assume(i1 %14)
%15 = extractvalue { i64, i1 } %12, 0
%16 = sub i64 0, %3
%17 = and i64 %15, %16
%18 = add i64 %5, 17
%19 = tail call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %17, i64 %18)
%20 = extractvalue { i64, i1 } %19, 0
%21 = extractvalue { i64, i1 } %19, 1
%22 = sub nuw i64 -9223372036854775808, %3
%23 = icmp ule i64 %20, %22
%24 = xor i1 %21, true
tail call void @llvm.assume(i1 %24)
tail call void @llvm.assume(i1 %23)
%25 = load ptr, ptr %0, align 8, !nonnull !4, !noundef !4
%26 = sub nsw i64 0, %17
%27 = getelementptr inbounds i8, ptr %25, i64 %26
%28 = icmp sgt i64 %11, -1
tail call void @llvm.assume(i1 %28)
tail call void @__rust_dealloc(ptr noundef nonnull %27, i64 noundef %20, i64 noundef %3) #12
%7 = mul nuw i64 %6, %2
%8 = add i64 %3, -1
%9 = add nuw i64 %8, %7
%10 = sub i64 0, %3
%11 = and i64 %9, %10
%12 = add i64 %5, 17
%13 = add nuw i64 %11, %12
%14 = sub nuw i64 -9223372036854775808, %3
%15 = icmp ule i64 %13, %14
tail call void @llvm.assume(i1 %15)
%16 = load ptr, ptr %0, align 8, !nonnull !4, !noundef !4
%17 = sub nsw i64 0, %11
%18 = getelementptr inbounds i8, ptr %16, i64 %17
tail call void @__rust_dealloc(ptr noundef nonnull %18, i64 noundef %13, i64 noundef %3) #12
ret void
}

Expand All @@ -171,42 +157,28 @@ define hidden void @_ZN9hashbrown3raw5inner13RawTableInner16drop_inner_table17h9
%5 = getelementptr inbounds i8, ptr %0, i64 8
%6 = load i64, ptr %5, align 8, !noundef !4
%7 = icmp eq i64 %6, 0
br i1 %7, label %32, label %8
br i1 %7, label %22, label %8

8: ; preds = %4
tail call void @llvm.experimental.noalias.scope.decl(metadata !15)
%9 = add i64 %6, 1
%10 = tail call { i64, i1 } @llvm.umul.with.overflow.i64(i64 %2, i64 %9)
%11 = extractvalue { i64, i1 } %10, 1
%12 = xor i1 %11, true
tail call void @llvm.assume(i1 %12)
%13 = extractvalue { i64, i1 } %10, 0
%14 = add i64 %3, -1
%15 = tail call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %13, i64 %14)
%16 = extractvalue { i64, i1 } %15, 1
%17 = xor i1 %16, true
tail call void @llvm.assume(i1 %17)
%18 = extractvalue { i64, i1 } %15, 0
%19 = sub i64 0, %3
%20 = and i64 %18, %19
%21 = add i64 %6, 17
%22 = tail call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %20, i64 %21)
%23 = extractvalue { i64, i1 } %22, 0
%24 = extractvalue { i64, i1 } %22, 1
%25 = sub nuw i64 -9223372036854775808, %3
%26 = icmp ule i64 %23, %25
%27 = xor i1 %24, true
tail call void @llvm.assume(i1 %27)
tail call void @llvm.assume(i1 %26)
%28 = load ptr, ptr %0, align 8, !alias.scope !15, !nonnull !4, !noundef !4
%29 = sub nsw i64 0, %20
%30 = getelementptr inbounds i8, ptr %28, i64 %29
%31 = icmp sgt i64 %14, -1
tail call void @llvm.assume(i1 %31)
tail call void @__rust_dealloc(ptr noundef nonnull %30, i64 noundef %23, i64 noundef %3) #12, !noalias !15
br label %32

32: ; preds = %4, %8
%10 = mul nuw i64 %9, %2
%11 = add i64 %3, -1
%12 = add nuw i64 %11, %10
%13 = sub i64 0, %3
%14 = and i64 %12, %13
%15 = add i64 %6, 17
%16 = add nuw i64 %15, %14
%17 = sub nuw i64 -9223372036854775808, %3
%18 = icmp ule i64 %16, %17
tail call void @llvm.assume(i1 %18)
%19 = load ptr, ptr %0, align 8, !alias.scope !15, !nonnull !4, !noundef !4
%20 = sub nsw i64 0, %14
%21 = getelementptr inbounds i8, ptr %19, i64 %20
tail call void @__rust_dealloc(ptr noundef nonnull %21, i64 noundef %16, i64 noundef %3) #12, !noalias !15
br label %22

22: ; preds = %4, %8
ret void
}

Expand Down
653 changes: 317 additions & 336 deletions bench/diesel-rs/optimized/1pu1gypvn16sk7jj.ll
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655 changes: 315 additions & 340 deletions bench/diesel-rs/optimized/1zhqdyjorbzdhypm.ll
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