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Support runtime DMA region configuration #620

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Support runtime DMA region configuration #620

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26121bf
Runtime DMA region configuration
GregBurns Mar 5, 2024
40d3f63
Merge branch 'electro-smith:master' into dma_region_cfg
GregBurns Mar 8, 2024
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17 changes: 16 additions & 1 deletion core/STM32H750IB_flash.lds
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Original file line number Diff line number Diff line change
Expand Up @@ -10,7 +10,8 @@ MEMORY
FLASH (RX) : ORIGIN = 0x08000000, LENGTH = 128K
DTCMRAM (RWX) : ORIGIN = 0x20000000, LENGTH = 128K
SRAM (RWX) : ORIGIN = 0x24000000, LENGTH = 512K
RAM_D2 (RWX) : ORIGIN = 0x30000000, LENGTH = 288K
RAM_D2_DMA (RWX) : ORIGIN = 0x30000000, LENGTH = 32K
RAM_D2 (RWX) : ORIGIN = ORIGIN(RAM_D2_DMA) + LENGTH(RAM_D2_DMA), LENGTH = 256K - LENGTH(RAM_D2_DMA)
RAM_D3 (RWX) : ORIGIN = 0x38000000, LENGTH = 64K
BACKUP_SRAM (RWX) : ORIGIN = 0x38800000, LENGTH = 4K
ITCMRAM (RWX) : ORIGIN = 0x00000000, LENGTH = 64K
Expand Down Expand Up @@ -139,6 +140,20 @@ SECTIONS
PROVIDE(__dtcmram_bss_end__ = _edtcmram_bss);
} > DTCMRAM

.sram1_bss (NOLOAD) :
{
. = ALIGN(4);
_ssram1_bss = .;

PROVIDE(__sram1_bss_start__ = _sram1_bss);
*(.sram1_bss)
*(.sram1_bss*)
. = ALIGN(4);
_esram1_bss = .;

PROVIDE(__sram1_bss_end__ = _esram1_bss);
} > RAM_D2_DMA

.sram1_bss (NOLOAD) :
{
. = ALIGN(4);
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4 changes: 2 additions & 2 deletions core/STM32H750IB_qspi.lds
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Original file line number Diff line number Diff line change
Expand Up @@ -12,7 +12,7 @@ MEMORY
DTCMRAM (RWX) : ORIGIN = 0x20000000, LENGTH = 128K
SRAM (RWX) : ORIGIN = 0x24000000, LENGTH = 512K
RAM_D2_DMA (RWX) : ORIGIN = 0x30000000, LENGTH = 32K
RAM_D2 (RWX) : ORIGIN = 0x30008000, LENGTH = 256K
RAM_D2 (RWX) : ORIGIN = ORIGIN(RAM_D2_DMA) + LENGTH(RAM_D2_DMA), LENGTH = 256K - LENGTH(RAM_D2_DMA)
RAM_D3 (RWX) : ORIGIN = 0x38000000, LENGTH = 64K
BACKUP_SRAM (RWX) : ORIGIN = 0x38800000, LENGTH = 4K
ITCMRAM (RWX) : ORIGIN = 0x00000000, LENGTH = 64K
Expand Down Expand Up @@ -268,4 +268,4 @@ SECTIONS
libgcc.a ( * )
}

}
}
4 changes: 2 additions & 2 deletions core/STM32H750IB_sram.lds
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Original file line number Diff line number Diff line change
Expand Up @@ -11,7 +11,7 @@ MEMORY
DTCMRAM (RWX) : ORIGIN = 0x20000000, LENGTH = 128K
SRAM (RWX) : ORIGIN = 0x24000000, LENGTH = 512K - 32K
RAM_D2_DMA (RWX) : ORIGIN = 0x30000000, LENGTH = 32K
RAM_D2 (RWX) : ORIGIN = 0x30008000, LENGTH = 256K
RAM_D2 (RWX) : ORIGIN = ORIGIN(RAM_D2_DMA) + LENGTH(RAM_D2_DMA), LENGTH = 256K - LENGTH(RAM_D2_DMA)
RAM_D3 (RWX) : ORIGIN = 0x38000000, LENGTH = 64K
BACKUP_SRAM (RWX) : ORIGIN = 0x38800000, LENGTH = 4K
ITCMRAM (RWX) : ORIGIN = 0x00000000, LENGTH = 64K
Expand Down Expand Up @@ -266,4 +266,4 @@ SECTIONS
libgcc.a ( * )
}

}
}
34 changes: 32 additions & 2 deletions src/sys/system.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -518,14 +518,44 @@ void System::ConfigureClocks()
HAL_PWREx_EnableUSBVoltageDetector();
}

extern "C"
{
// Non-cacheable RAM D2 address range
extern uint32_t _ssram1_bss, _esram1_bss;
}

// Map a region size in byte to an appropriate value
static uint8_t MPURegionSize(void* sAddr, void* eAddr)
{
uint32_t sz = (uint8_t*)eAddr - (uint8_t*)sAddr;
if(sz <= 1 * 1024)
return MPU_REGION_SIZE_1KB;
if(sz <= 2 * 1024)
return MPU_REGION_SIZE_2KB;
if(sz <= 4 * 1024)
return MPU_REGION_SIZE_4KB;
if(sz <= 8 * 1024)
return MPU_REGION_SIZE_8KB;
if(sz <= 16 * 1024)
return MPU_REGION_SIZE_16KB;
if(sz <= 32 * 1024)
return MPU_REGION_SIZE_32KB;
if(sz <= 64 * 1024)
return MPU_REGION_SIZE_64KB;
if(sz <= 128 * 1024)
return MPU_REGION_SIZE_128KB;
else
return MPU_REGION_SIZE_256KB;
}

void System::ConfigureMpu()
{
MPU_Region_InitTypeDef MPU_InitStruct;
HAL_MPU_Disable();
// Configure RAM D2 (SRAM1) as non cacheable
MPU_InitStruct.Enable = MPU_REGION_ENABLE;
MPU_InitStruct.BaseAddress = 0x30000000;
MPU_InitStruct.Size = MPU_REGION_SIZE_32KB;
MPU_InitStruct.BaseAddress = (uint32_t)&_ssram1_bss;
MPU_InitStruct.Size = MPURegionSize(&_ssram1_bss, &_esram1_bss);
MPU_InitStruct.AccessPermission = MPU_REGION_FULL_ACCESS;
MPU_InitStruct.IsBufferable = MPU_ACCESS_NOT_BUFFERABLE;
MPU_InitStruct.IsCacheable = MPU_ACCESS_NOT_CACHEABLE;
Expand Down