[nrf fromlist] soc: nordic: common: nrf_sys_event: Add API for registering an event #3535
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Move the option to force constant latency mode outside of nRF54l, since it is an option applicable to most Nordic SoCs. Signed-off-by: Jordan Yates <jordan@embeint.com> (cherry picked from commit 169957f)
…NSTLAT` Validate that `CONFIG_SOC_NRF_FORCE_CONSTLAT=y` compiles. Signed-off-by: Jordan Yates <jordan@embeint.com> (cherry picked from commit 75cb327)
Add HAS_HW_NRF_RRAMC Kconfig to indicate presence of the RRAMC controller. Upstream PR #: 99377 Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
…ering an event Add API for indicating that a deterministic interrupt will occur at certain point in time in the future. Implementation is ensuring that there will be no latency due to NVM memory waking up. There are 2 ways of ensuring that: - setting low latency power mode in RRAMC (higher power consumption in idle (not available in non-secure build) - using PPI and GRTC to trigger the RRAMC wake up task right before an expected interrupt Module has a pool of GRTC channels and dynamically allocates and frees those channels when events are registered and unregistered. If GRTC channel is not available then algorithm falls back to power mode setting (in secure build). API offers registering an event using relative and absolute timing. API can be used from Zero Latency interrupts. Upstream PR #: 99377 Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
Use API for registering synchronous interrupts. It reduced interrupt latency due to NVM memory wake up. Upstream PR #: 99377 Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
Add part which is using event register and unregister functionality. Upstream PR #: 99377 Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
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Automatically created by action-manifest-pr GH action from PR: nrfconnect/sdk-zephyr#3535 Signed-off-by: Nordic Builder <pylon@nordicsemi.no>
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Add API for registering an event to ensure that interrupt latency is low as RRAMC is powered up due to low latency power mode or being waken up on time before the actual interrupt.
PR adds RRAMC waking up to the system timer using GRTC. It means that PPI is waking up RRAMC 16 us before expected GRTC interrupt to avoid 16 us latency. Improvement can be seen in a following code snippet where
CONFIG_NRF_CPU_LOAD=yis used for accurate CPU load measuring:Default load 16.25% vs with
CONFIG_NRF_SYS_EVENT=y12.2%Currently MPSL is controlling RRAMC power mode so
DNMuntil it is aligned.